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baytrail: add initial support

Hardware / Coreboot - Aaron Durbin [chromium.org] - 31 January 2014 09:36 UTC

The initial Bay Trail code is intended to support the mobile and desktop version of Bay Trail. This support can train memory and execute through ramstage. However, the resource allocation is not curently handled correctly. The MRC cache parameters are successfully saved and reused after the initial cold boot.

BUG=chrome-os-partner:22292 BRANCH=None TEST=Built and booted on a reference board through ramstage.

Change-Id: I238ede326802aad272c6cca39d7ad4f161d813f5

9a7d7bc baytrail: add initial support
Makefile.inc | 2 +-
src/Kconfig | 2 +
src/soc/Kconfig | 3 +
src/soc/Makefile.inc | 4 +
src/soc/intel/Kconfig | 1 +
src/soc/intel/Makefile.inc | 1 +
src/soc/intel/baytrail/Kconfig | 236 +
src/soc/intel/baytrail/Makefile.inc | 65 +
src/soc/intel/baytrail/acpi/globalnvs.asl | 284 +
src/soc/intel/baytrail/acpi/sleepstates.asl | 27 +
src/soc/intel/baytrail/acpi/southcluster.asl | 32 +
src/soc/intel/baytrail/baytrail/acpi.h | 29 +
src/soc/intel/baytrail/baytrail/gpio.h | 70 +
src/soc/intel/baytrail/baytrail/iomap.h | 38 +
src/soc/intel/baytrail/baytrail/iosf.h | 111 +
src/soc/intel/baytrail/baytrail/lpc.h | 34 +
src/soc/intel/baytrail/baytrail/mrc_cache.h | 40 +
src/soc/intel/baytrail/baytrail/mrc_wrapper.h | 88 +
src/soc/intel/baytrail/baytrail/msr.h | 25 +
src/soc/intel/baytrail/baytrail/nvm.h | 34 +
src/soc/intel/baytrail/baytrail/nvs.h | 136 +
src/soc/intel/baytrail/baytrail/pci_devs.h | 149 +
src/soc/intel/baytrail/baytrail/pmc.h | 30 +
src/soc/intel/baytrail/baytrail/romstage.h | 46 +
src/soc/intel/baytrail/bootblock/bootblock.c | 39 +
src/soc/intel/baytrail/chip.c | 74 +
src/soc/intel/baytrail/chip.h | 29 +
src/soc/intel/baytrail/iosf.c | 61 +
src/soc/intel/baytrail/memmap.c | 27 +
.../intel/baytrail/microcode/M0C3067_0000030f.h |13056 ++++++++++++++++++++
src/soc/intel/baytrail/microcode/Makefile.inc | 1 +
src/soc/intel/baytrail/microcode/microcode_blob.c | 3 +
src/soc/intel/baytrail/mrc_cache.c | 294 +
src/soc/intel/baytrail/nvm.c | 83 +
src/soc/intel/baytrail/placeholders.c | 21 +
src/soc/intel/baytrail/romstage/Makefile.inc | 4 +
src/soc/intel/baytrail/romstage/cache_as_ram.inc | 280 +
src/soc/intel/baytrail/romstage/raminit.c | 93 +
src/soc/intel/baytrail/romstage/romstage.c | 218 +
src/soc/intel/baytrail/romstage/uart.c | 39 +
src/soc/intel/baytrail/spi.c | 654 +
src/soc/intel/baytrail/tsc_freq.c | 32 +
42 files changed, 16494 insertions(+), 1 deletion(-)

Upstream: review.coreboot.org