SYNOPSIS

likwid-features [-vhal] [-c cpus] [-e taglist] [-d taglist]

DESCRIPTION

likwid-features is a command line application to print the flags in the model specific register (MSR) MSR_IA32_MISC_ENABLE on Intel x86 processors. On Core2 and later processors it can be used to toggle the hardware prefetch flags. It does not work on AMD processors. For a documentation what flags are supported on which processor refer to the Intel Software Developer's Manual Volume 3B, Table B.2 and https://software.intel.com/en-us/articles/disclosure-of-hw-prefetcher-control-on-some-intel-processors. The MSR are set individually for every core. The following hardware prefetchers can be toggled:

• HW_PREFETCHER: Hardware prefetcher.
• CL_PREFETCHER: Adjacent cache line prefetcher.
• DCU_PREFETCHER: When the DCU prefetcher detects multiple loads from the same line done within a time limit, the DCU prefetcher assumes the next line will be required. The next line is prefetched in to the L1 data cache from memory or L2.
• IP_PREFETCHER: The IP prefetcher is an L1 data cache prefetcher. The IP prefetcher looks for sequential load history to determine whether to prefetch the next expected data into the L1 cache from memory or L2.

OPTIONS

-v

prints version information to standard output, then exits.

-h

prints a help message to standard output, then exits.

-a

List out the names of all detected features

-l

Print the state of all features for the given CPUs

-c cpus

set on which processor cores the MSR should be read and written. Syntax according to likwid-pin(1)

-d HW_PREFETCHER | CL_PREFETCHER | DCU_PREFETCHER | IP_PREFETCHER

specify which prefetcher should be disabled. Argument can be a comma-separated list.

-e HW_PREFETCHER | CL_PREFETCHER | DCU_PREFETCHER | IP_PREFETCHER

specify which prefetcher should be enabled. Argument can be a comma-separated list.

AUTHOR

Written by Thomas Röhl <[email protected]>.

BUGS

Report Bugs on <https://github.com/RRZE-HPC/likwidissues>.