module sin(input [6:0] n, output [31:0] out);
wire [31:0] sin_table[0:90];
	assign sin_table[0] = 32'h00000000;
	assign sin_table[1] = 32'h3c8ef859;
	assign sin_table[2] = 32'h3d0ef2c6;
	assign sin_table[3] = 32'h3d565e3a;
	assign sin_table[4] = 32'h3d8edc7b;
	assign sin_table[5] = 32'h3db27eb6;
	assign sin_table[6] = 32'h3dd61305;
	assign sin_table[7] = 32'h3df996a2;
	assign sin_table[8] = 32'h3e0e8365;
	assign sin_table[9] = 32'h3e20305b;
	assign sin_table[10] = 32'h3e31d0d4;
	assign sin_table[11] = 32'h3e43636f;
	assign sin_table[12] = 32'h3e54e6cd;
	assign sin_table[13] = 32'h3e665992;
	assign sin_table[14] = 32'h3e77ba60;
	assign sin_table[15] = 32'h3e8483ee;
	assign sin_table[16] = 32'h3e8d2057;
	assign sin_table[17] = 32'h3e95b1be;
	assign sin_table[18] = 32'h3e9e377a;
	assign sin_table[19] = 32'h3ea6b0df;
	assign sin_table[20] = 32'h3eaf1d44;
	assign sin_table[21] = 32'h3eb77c01;
	assign sin_table[22] = 32'h3ebfcc6f;
	assign sin_table[23] = 32'h3ec80de9;
	assign sin_table[24] = 32'h3ed03fc9;
	assign sin_table[25] = 32'h3ed8616c;
	assign sin_table[26] = 32'h3ee0722f;
	assign sin_table[27] = 32'h3ee87171;
	assign sin_table[28] = 32'h3ef05e94;
	assign sin_table[29] = 32'h3ef838f7;
	assign sin_table[30] = 32'h3f000000;
	assign sin_table[31] = 32'h3f03d989;
	assign sin_table[32] = 32'h3f07a8ca;
	assign sin_table[33] = 32'h3f0b6d77;
	assign sin_table[34] = 32'h3f0f2744;
	assign sin_table[35] = 32'h3f12d5e8;
	assign sin_table[36] = 32'h3f167918;
	assign sin_table[37] = 32'h3f1a108d;
	assign sin_table[38] = 32'h3f1d9bfe;
	assign sin_table[39] = 32'h3f211b24;
	assign sin_table[40] = 32'h3f248dbb;
	assign sin_table[41] = 32'h3f27f37c;
	assign sin_table[42] = 32'h3f2b4c25;
	assign sin_table[43] = 32'h3f2e9772;
	assign sin_table[44] = 32'h3f31d522;
	assign sin_table[45] = 32'h3f3504f3;
	assign sin_table[46] = 32'h3f3826a7;
	assign sin_table[47] = 32'h3f3b39ff;
	assign sin_table[48] = 32'h3f3e3ebd;
	assign sin_table[49] = 32'h3f4134a6;
	assign sin_table[50] = 32'h3f441b7d;
	assign sin_table[51] = 32'h3f46f30a;
	assign sin_table[52] = 32'h3f49bb13;
	assign sin_table[53] = 32'h3f4c7360;
	assign sin_table[54] = 32'h3f4f1bbd;
	assign sin_table[55] = 32'h3f51b3f3;
	assign sin_table[56] = 32'h3f543bce;
	assign sin_table[57] = 32'h3f56b31d;
	assign sin_table[58] = 32'h3f5919ae;
	assign sin_table[59] = 32'h3f5b6f51;
	assign sin_table[60] = 32'h3f5db3d7;
	assign sin_table[61] = 32'h3f5fe714;
	assign sin_table[62] = 32'h3f6208da;
	assign sin_table[63] = 32'h3f641901;
	assign sin_table[64] = 32'h3f66175e;
	assign sin_table[65] = 32'h3f6803ca;
	assign sin_table[66] = 32'h3f69de1d;
	assign sin_table[67] = 32'h3f6ba635;
	assign sin_table[68] = 32'h3f6d5bec;
	assign sin_table[69] = 32'h3f6eff20;
	assign sin_table[70] = 32'h3f708fb2;
	assign sin_table[71] = 32'h3f720d81;
	assign sin_table[72] = 32'h3f737871;
	assign sin_table[73] = 32'h3f74d063;
	assign sin_table[74] = 32'h3f76153f;
	assign sin_table[75] = 32'h3f7746ea;
	assign sin_table[76] = 32'h3f78654d;
	assign sin_table[77] = 32'h3f797051;
	assign sin_table[78] = 32'h3f7a67e2;
	assign sin_table[79] = 32'h3f7b4beb;
	assign sin_table[80] = 32'h3f7c1c5c;
	assign sin_table[81] = 32'h3f7cd925;
	assign sin_table[82] = 32'h3f7d8235;
	assign sin_table[83] = 32'h3f7e1781;
	assign sin_table[84] = 32'h3f7e98fd;
	assign sin_table[85] = 32'h3f7f069e;
	assign sin_table[86] = 32'h3f7f605c;
	assign sin_table[87] = 32'h3f7fa62f;
	assign sin_table[88] = 32'h3f7fd814;
	assign sin_table[89] = 32'h3f7ff605;
	assign sin_table[90] = 32'h3f800000;


	assign out = sin_table[n]; 
endmodule

module test;
	reg [6:0] n;
	wire [31:0] out;
	sin u(.n(n), .out(out));
	integer i;
	initial
	begin
		for (i = 0; i < 91; i++)
		begin
			#10;
			n = i;
			$display("%h", out);
		end 
		$finish();
	end
endmodule