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⇱ intel 8080 アセンブラ 命令セット #i8080 - Qiita


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@ohisama@github

intel 8080 アセンブラ 命令セット

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Last updated at Posted at 2015-04-23

データ転送

MOV r1, r2 r1 <- r2 Move register r2 to register r1
MOV M, r [hl] <- r Move register to memory thru H-L
MOV r, M r <- [hl] Move memory to register thru H-L
MVI r, d8 r <- d8 Move immediate to register
MVI M, d8 [hl] <- d8 Move immediate to memory thru H-L
STAX B	 [bc] <- a Store A indirect thru BC
STAX D	 [de] <- a Store A indirect thru DE
LDAX B	 a <- [bc] Load A indirect thru BC
LDAX D	 a <- [de] Load A indirect thru DE
STA ad	 [ad] <- a Store A to memory
LDA ad	 a <- [hl] Load A from memory
LXI B, d16 bc <- d16 Load register pair B-C immediate
LXI D, d16 de <- d16 Load register pair D-E immediate
LXI H, d16 hl <- d16 Load register pair H-L immediate
SHLD ad	 [ad] <- hl Store H:L to memory
LHLD ad	 hl <- [ad] Load H:L from memory
XCHG	 de <=> hl Exchange D-E and H-L content

足し算(flag)

ADD r	a <- a + r Add register to A
ADD M	a <- a + [hl] Add register to A thru H-L
ADI d8	a <- a + d8 Add immediate to A
ADC r	a <- a + r + cy Add register to A with carry
ADC M	a <- a + [hl] + cy Add register to A with carry thru H-L
ACI d8	a <- a + d8 + cy Add immediate to A with carry
DAD B	HL <- HL + BC Add register pair B-C to H-L 
DAD D	HL <- HL + DE Add register pair D-E to H-L 
DAD H	HL <- HL + HL Add register pair H-L to H-L 
DAD SP	HL <- HL + SP Add stack pointer to H-L 

引き算(flag)

SUB r	a <- a - r Subtract register from A
SUB M	a <- a - [hl] Subtract register from A thru H-L
SUI d8	a <- a - d8 Subtract immediate from A
SBB r	a <- a - r + cy Subtract register from A with borrow
SBB M	a <- a - [hl] + cy Subtract register from A with borrow thru H-L
SBI d8	a <- a - d8 + cy Subtract immediate from A with borrow

論理演算(flag)

ANA r	a <- a & r AND register with A
ANA M	a <- a & [hl] AND register with A thru H-L
ANI d8	a <- a & d8 AND immediate with A
ORA r	a <- a | r OR register with A
ORA M	a <- a | [hl] OR register with A thru H-L
ORI d8	a <- a | d8 OR immediate with A
XRA r	a <- a ^ r ExclusiveOR register with A
XRA M	a <- a ^ [hl] ExclusiveOR register with A thru H-L
XRI d8	a <- a ^ d8 ExclusiveOR immediate with A
CMP r	flg <- a - r Compare register with A
CMP M	flg <- a - [hl] Compare register with A thru H-L
CPI d8	flg <- a - d8 Compare immediate with A

シフト

RLC	左循環 Rotate A left(with carry affected)
RRC	右循環 Rotate A right(with carry affected)
RAL	cy + 左循環 Rotate A left through carry
RAR	cy + 右循環 Rotate A right through carry

雑命令(flag)

CMA	cy <- Compliment A
CMC	cy <- Compliment Carry flag
STC	cy <- 1 Set Carry flag
DAA	a <- Decimal Adjust accumulator

インクレメントデクレメント(flag)

INR r	r <- r + 1 Increment register
INR M	[hl] <- [hl] + 1 Increment memory thru H-L
DCR r	r <- r - 1 Decrement register
DCR M	[hl] <- [hl] - 1 Decrement memory thru H-L
INX B	bc <- bc + 1 Increment B-C register pair
INX D	de <- de + 1 Increment D-E register pair
INX H	hl <- hl + 1 Increment H-L register pair
DCX B	bc <- bc - 1 Decrement B-C register pair
DCX D	de <- de - 1 Decrement D-E register pair
DCX H	hl <- hl - 1 Decrement H-L register pair

ジャンプ

JMP ad	pc <- ad jump Unconditional 
JC ad	cy ? pc <- ad : jump on carry
JNC ad cy ? : pc <- ad jump on no carry
JZ ad zero ? pc <- ad : jump on zero 
JNZ ad zero ? pc <- ad : jump on no zero
JP ad posi ? pc <- ad : jump on positive
JM ad minus ? pc <- ad : jump on minus
JPE ad even ? pc <- ad : jump on parity even
JPO ad odd ? pc <- ad : jump on parity odd
PCHL pc <- hl H-L to program counter

サブルーチン

CALL ad	[sp--] <- PC; PC <- ad CALL Unconditional 
CC ad	cy ? [sp--] <- PC; PC <- ad : CALL on carry
CNC ad cy ? : [sp--] <- PC; PC <- ad CALL on no carry
CZ ad zero ? [sp--] <- PC; PC <- ad : CALL on zero 
CNZ ad zero ? : [sp--] <- PC; PC <- ad CALL on no zero
CP ad posi ? [sp--] <- PC; PC <- ad : CALL on positive
CM ad minus ? [sp--] <- PC; PC <- ad : CALL on minus
CPE ad even ? [sp--] <- PC; PC <- ad : CALL on parity even
CPO ad odd ? [sp--] <- PC; PC <- ad : CALL on parity odd
RST m Restart from m

リターン

RET PC <- [sp++] Return
RC ad	cy ? PC <- [sp++] : Return on carry
RNC ad cy ? : PC <- [sp++] Return on no carry
RZ ad zero ? PC <- [sp++] : Return on zero 
RNZ ad zero ? : PC <- [sp++] Return on no zero
RP ad posi ? PC <- [sp++] : Return on positive
RM ad minus ? PC <- [sp++] : Return on minus
RPE ad even ? PC <- [sp++] : Return on parity even
RPO ad odd ? PC <- [sp++] : Return on parity odd

スタック

PUSH B	 [sp--] <- bc Push register pair B-C on the stack
PUSH D	 [sp--] <- de Push register pair D-E on the stack
PUSH H	 [sp--] <- hl Push register pair H-L on the stack
PUSH PSW [sp--] <- af Push A and flags on the stack
POP B	 bc <- [sp++] Pop register pair B-C from the stack
POP D	 de <- [sp++] Pop register pair D-E from the stack
POP H	 hl <- [sp++] Pop register pair H-L from the stack
POP PSW	 af <- [sp++] Pop A and flags from the stack
XTHL	 hl <=> [sp] Swap H:L with top word on stack
SPHL	 sp <- hl Set SP to content of H:L
LXI SP, ad sp <- [ad] Load immediate stack pointer
INX SP sp <- sp + 1 Increment stack pointer
DCX SP sp <- sp - 1 Decrement stack pointer

入出力

IN n a <- port[n] Input from port n
OUT n port[n] <- a Output to port n

割り込み

EI	Enable interrupts
DI	Disable interrupts
HLT	Halt processor
NOP	No operation

補足

レジスタは、8ビットで使えるのは7個。
アキュムレータ : A (8bit)
フラグレジスタ : PSW (8bit)
6つの汎用レジスタ : B, C, D, E, H, L (8bit)
スタックポインタ : SP (16bit)
プログラムカウンタ : PC (16bit)
フラグは、5個ある。
命令長は、1~3バイト。
相対ジャンプがない。
スタックは、SPHL。

以上

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