Last updated: April 25, 2026 – This article has been reviewed and updated with the latest information.

NVIDIA GTC 2026 kicked off on March 16 in San Jose, California, marking the company’s most ambitious GPU Technology Conference yet. With 30,000 attendees from 190 countries converging on 10 venues across downtown San Jose, the event serves as the launchpad for NVIDIA’s next-generation Rubin GPU architecture – a platform that CEO Jensen Huang has promised will “surprise the world.” The stakes could not be higher: NVIDIA’s dominance in AI accelerators faces growing pressure from AMD, Intel, and custom silicon from hyperscalers like Meta, Google, and Amazon, while demand for AI compute continues to outstrip supply by orders of magnitude.

April 2026: Nvidia Vera Rubin Ultra Scaled Back to Dual-Die Design

Updated April 2, 2026. Major development in the Nvidia GPU roadmap: the Rubin Ultra has been reportedly scaled back from a four-die to a dual-die design, according to multiple industry sources. The original four-die configuration faced yield issues at TSMC’s CoWoS-L advanced packaging, with insiders suggesting the interconnect bandwidth between four dies couldn’t meet Nvidia’s latency targets for inference workloads.

Despite the redesign, Nvidia claims the dual-die Rubin Ultra will still deliver a 3.5x improvement in inference throughput per watt over current Blackwell B300 configurations. The Vera Rubin platform – which includes the Rubin GPU, Vera CPU (72 Grace ARM cores), and NVLink 6 interconnect – was unveiled at GTC 2026 as the foundation for “agentic AI” workloads. Jensen Huang described it as enabling AI systems that can “reason, plan, and act autonomously.”

For buyers and data center operators, the timeline remains on track: Rubin R100 sampling in Q4 2026, volume production Q1 2027. DGX Rubin rack pricing is expected at $3.5-4 million. Meanwhile, Blackwell B300 availability has improved significantly – lead times dropped from 36 weeks to 18 weeks as demand for current-gen hardware stabilizes ahead of the Rubin transition.

What NVIDIA Announced at GTC 2026: The Full Rubin Platform Breakdown

Jensen Huang’s keynote address at the SAP Center, scheduled for March 16 from 11 a.m. to 1 p.m. PT, follows a pregame show that began at 8 a.m. featuring industry leaders discussing AI advances and real-world deployment scenarios. The NVIDIA GTC 2026 keynote covers the full technology stack – chips, software, models, and applications – with Rubin at the center of every announcement.

The Rubin GPU architecture was first unveiled at CES 2026 in January, where NVIDIA announced six new chips and an AI supercomputer built on the platform. At GTC 2026, the company is expected to provide production deployment timelines, customer adoption details, and expanded platform capabilities that build on those initial announcements.

The core Rubin platform encompasses far more than a GPU. It is a complete compute architecture consisting of the Rubin GPU, the Vera CPU, a next-generation DPU, advanced NICs, NVLink 6 scale-up networking, and Ethernet switching infrastructure. This integrated approach means NVIDIA is not just selling chips – it is selling entire AI factory blueprints.

Rubin GPU Core Specifications

The Rubin GPU is built on TSMC’s 3nm process (N3/N3P), representing a full node shrink from Blackwell’s TSMC 4NP. It features a dual-die design with two reticle-sized compute chiplets containing a combined 336 billion transistors – a 1.6x increase over Blackwell’s 208 billion. Each GPU is equipped with 288GB of HBM4 memory delivering 22 TB/s of bandwidth, nearly tripling Blackwell’s 8 TB/s on HBM3e.

Performance numbers are equally dramatic. The Rubin GPU delivers 50 petaflops of FP4 inference performance and 35 petaflops of FP4 training performance per chip. These figures represent a 2.5x to 5x improvement over Blackwell in inference and a 3.5x improvement in training. The third-generation Transformer Engine with NVFP4 and adaptive compression enables these gains, along with simultaneous multithreading (SMT) supporting 176 threads per GPU.

Specification	NVIDIA Rubin (2026)	NVIDIA Blackwell (2024-2025)	Improvement
Transistor Count	336 billion	208 billion	1.6x
Process Node	TSMC 3nm (N3/N3P)	TSMC 4NP	Full node shrink
HBM Capacity	288GB HBM4	192GB HBM3e	1.5x
Memory Bandwidth	22 TB/s	8 TB/s	2.75x
FP4 Inference	50 PFLOPS	10-20 PFLOPS	2.5-5x
FP4 Training	35 PFLOPS	~10 PFLOPS	3.5x
NVLink Bandwidth (per GPU)	3.6 TB/s	1.8 TB/s	2x
TDP	~2,300W	~1,200W	1.9x

April 2026: Rubin R200 Multi-Chip Module – Two Compute Dies, Two I/O Dies, Eight HBM4 Stacks

NVIDIA’s GTC 2026 disclosures finalized the physical layout of the Rubin R200 package, and the picture is more granular than the earlier “dual-die” shorthand suggested. The R200 is a true multi-chip module on TSMC 3nm, comprising two compute dies plus two dedicated I/O dies in a single package – a four-tile arrangement that separates compute scaling from interconnect and memory-controller scaling. Around that compute core, the R200 carries 288 GB of HBM4 across eight stacks for the headline 22 TB/s of bandwidth, and exposes 224 Streaming Multiprocessors per GPU for the 50 PFLOPS of FP4 inference figure NVIDIA quotes. The 1,800 to 2,300W TDP envelope and the 100% liquid cooling requirement follow directly from that density – there is no air-cooled R200 SKU at any TDP point. For operators reverse-engineering performance from public specs, the eight-stack HBM4 layout is the structural detail that makes the 2.8x bandwidth gain over Blackwell B200’s 8 TB/s reproducible rather than vendor-specific marketing.

Vera CPU and the Integrated AI Factory Architecture

The Vera CPU, NVIDIA’s companion processor for the Rubin platform, is purpose-built for AI data movement and agentic processing. It features 88 custom Olympus ARM cores based on the Armv9.2 architecture, designed specifically for the data orchestration demands of large-scale AI training and inference workloads.

👁 Vera CPU and the Integrated AI Factory Architecture

Vera connects to Rubin GPUs via NVLink-C2C with 1.8 TB/s of bandwidth – double the chip-to-chip bandwidth of previous generations. This tight coupling between CPU and GPU eliminates bottlenecks that have historically limited data center throughput, particularly for workloads involving massive context windows and multi-trillion parameter models.

The AI factory concept that NVIDIA has been promoting since 2024 comes to full fruition with the Vera Rubin platform. Rather than discrete components assembled by system integrators, NVIDIA now delivers complete rack-scale solutions where every component – from silicon to networking to software – is co-designed for maximum throughput. This vertical integration strategy mirrors what Apple has done with its consumer hardware, but applied to data center infrastructure at unprecedented scale.

April 2026 Update: Seven-Chip Vera Rubin Platform Enters Full Production

At GTC in April 2026, NVIDIA confirmed that the Vera Rubin platform comprises seven new chips now in full production, a decisive shift from a GPU-only architecture to a complete vertically-integrated system. The lineup includes the new Vera CPU (replacing the Grace CPU), the Rubin GPU, the NVLink 6 Switch, the ConnectX-9 SuperNIC, the BlueField-4 DPU, and the Spectrum-6 Ethernet switch – all co-designed to eliminate the integration bottlenecks that plague multi-vendor AI deployments. Customers no longer buy individual components; they buy a co-engineered AI factory where every silicon block is tuned to work with the others.

The seventh chip – confirmed at GTC 2026 – is the BlueField-4 STX storage processor, the storage-side counterpart to the BlueField-4 DPU. STX rounds out the platform by giving the AI factory a dedicated silicon path for high-throughput training-data ingest and checkpoint I/O, the workloads that historically forced operators to bolt third-party storage accelerators onto NVIDIA racks. With STX in production alongside the Vera CPU, Rubin GPU, NVLink 6 Switch, ConnectX-9 SuperNIC, BlueField-4 DPU, and Spectrum-6 Ethernet switch, every data path inside a Vera Rubin rack – compute, scale-up fabric, scale-out fabric, host I/O, and storage – is now served by NVIDIA-designed silicon on the same architectural cadence.

NVL72, NVL144, and NVL576: Rack-Scale AI Compute at Unprecedented Density

One of the most significant aspects of the NVIDIA GTC 2026 announcements centers on the evolution of rack-scale computing. The Vera Rubin NVL72 rack, the direct successor to the Blackwell NVL72, delivers 260 TB/s of aggregate NVLink bandwidth – which NVIDIA claims exceeds the bandwidth of the entire internet. Each of the 72 GPUs in the rack contributes 3.6 TB/s of NVLink 6 bandwidth, enabling zero-copy tensor sharing across the entire coherency domain.

But the NVL72 is just the entry point. The NVL144 CPX platform, designed specifically for massive context inference, packs 8 exaflops of AI performance and 100TB of fast memory into a single rack. This configuration enables companies to monetize long-context AI applications that were previously impractical due to memory constraints – think million-token context windows running at production scale with acceptable latency.

The NVL576 takes density even further, supporting up to 576 GPUs in a single rack configuration with silicon photonics for rack-scale optical interconnects. At an estimated 600 kW per rack, the NVL576 requires purpose-built liquid cooling infrastructure and represents the kind of power density that is driving a renaissance in data center construction and energy planning worldwide.

GTC 2026 also confirmed that the NVL576 ships with a co-packaged optics (CPO) NVSwitch, replacing the pluggable optical transceivers used on prior rack-scale designs. Integrating the optics directly into the NVSwitch package shortens the electrical path between the switch SerDes and the fiber, which is the dominant power and signal-integrity bottleneck at 576-GPU scale. For operators, the practical effect of CPO is twofold: the per-port optics power budget drops sharply versus pluggable modules, and the failure surface shrinks because the transceiver count per rack falls by orders of magnitude – both of which matter when a single NVL576 rack is already pulling an estimated 600 kW.

Configuration	GPUs per Rack	AI Performance	Fast Memory	Power (est.)	Primary Use Case
Vera Rubin NVL72	72	3.6 exaflops	20.7 TB	120-130 kW	General AI training/inference
Vera Rubin NVL144 CPX	144	8 exaflops	100 TB	~260 kW	Massive context inference
Vera Rubin NVL576	576	28+ exaflops	165+ TB	~600 kW	Frontier model training

VR200 NVL72: 3.3x Inference Performance Over Blackwell Ultra GB300

The April 2026 GTC announcements put a hard number on the rack-level generational leap. The VR200 NVL72 flagship is expected to deliver 3.3 times the overall inference performance of the previous Blackwell Ultra GB300 NVL72, with the gains concentrated in the memory-bandwidth-bound workloads that dominate modern AI serving. For operators already running GB300 NVL72 racks, that ratio directly translates into a 3x reduction in rack count – or a 3x increase in tokens served – for the same floor space and networking footprint, which reshapes the economics of every large-scale inference deployment.

The VR200 NVL72’s HBM4 stacks run at over 11 Gbps per pin, pushing per-stack bandwidth past 3.0 TB/s – roughly 30% higher than competing AMD-equivalent HBM4 configurations disclosed to date. NVIDIA also confirmed at GTC 2026 that the VR200 NVL72 pairs Rubin GPUs with the new proprietary Vera CPU, fully replacing the Grace ARM CPU used in the Blackwell generation. The Vera-plus-Rubin pairing is what allows the rack to sustain the 3.3x inference ratio end-to-end, since the host CPU, NVLink fabric, and HBM4 subsystem all move forward in the same product cycle rather than as staggered refreshes.

April 2026: LPX Rack with Groq 3 LPUs for Trillion-Parameter Decode

One of the most consequential GTC 2026 announcements was the LPX Rack, a purpose-built decode-acceleration system using Groq 3 LPUs that co-deploys next to VR NVL72 racks. Connected via Spectrum X networking and hosted on the same MGX reference platform with full liquid cooling, the LPX Rack is scheduled for H2 2026 availability and requires no CUDA code changes – the Dynamo inference orchestration layer handles routing transparently. For trillion-parameter models, NVIDIA’s reference split allocates 25% of compute to LPX and 75% to Rubin GPUs, with the Groq 3 LPUs running Feed Forward layers while attention stays on Rubin. That division of labor leans on Groq’s deterministic-latency architecture for the decode-heavy FFN math and keeps Rubin focused on the compute patterns where HBM4 bandwidth and NVLink 6 give it the biggest edge.

A detail confirmed at GTC 2026 that has been underappreciated in early coverage: the Groq 3 LPUs in the LPX Rack are manufactured by Samsung, not TSMC. That sourcing choice diversifies the platform’s foundry exposure – every other piece of NVIDIA-designed silicon in a Vera Rubin rack runs through TSMC 3nm – and it gives Samsung Foundry a meaningful production socket inside the highest-end NVIDIA AI factory configuration shipping in 2026. For operators planning long-term LPX allocation, the Samsung dependency is a separate supply curve from the TSMC-bound Rubin and Vera supply, which can be either a hedge or an additional procurement complication depending on how Samsung’s HBM and advanced-packaging ramp tracks against demand.

Disaggregated AI Factories: NVL144 CPX Prefill at 1.7 PB/s

GTC 2026 also sharpened the role of the Vera Rubin NVL144 CPX configuration inside NVIDIA’s disaggregated AI factory blueprint. The NVL144 CPX delivers 8 exaflops of AI performance per rack, 100TB of fast memory, and an aggregate 1.7 PB/s of memory bandwidth, and now integrates HBM specifically for the prefill stage of high-throughput inference – the stage that dominates million-token context workloads. Pairing the NVL144 CPX on prefill with VR200 NVL72 racks on decode is how NVIDIA frames the new disaggregated AI factory: each rack class targets the stage of inference it is cheapest to run, and the Dynamo scheduler keeps the two flows in lock-step. For operators building for million-token contexts, this disaggregation is what turns the 8-exaflop/100TB headline into a practical, production-economic deployment pattern rather than a standalone spec sheet.

Why NVIDIA GTC 2026 Matters: The $2 Trillion AI Infrastructure Buildout

The significance of GTC 2026 extends far beyond product announcements. It arrives at a moment when the global AI infrastructure buildout is accelerating at a pace that has few historical parallels. Hyperscalers including Microsoft, Google, Amazon, Meta, and Oracle have collectively committed more than $300 billion in AI-related capital expenditures for 2025-2026, and the Rubin platform is central to many of these plans.

👁 Why NVIDIA GTC 2026 Matters: The $2 Trillion AI Infrastructure Buildout

NVIDIA’s production capacity for Rubin GPUs in 2026 is estimated at 200,000 to 300,000 units, constrained by TSMC’s advanced packaging capacity and HBM4 supply from SK Hynix and Samsung. This production ceiling creates a supply-demand imbalance that benefits NVIDIA’s pricing power and margin structure but also frustrates customers who need compute capacity immediately.

The partnership announcements at NVIDIA GTC 2026 underscore this dynamic. Companies are coordinating to deploy more than 5 gigawatts of AI processing capacity by the end of the decade, combining fleet management, inference systems, data center operations, and AI factory design. To put 5 GW in perspective, that is roughly equivalent to the electricity consumption of a small country and represents tens of billions of dollars in infrastructure investment.

For context on the broader AI chip market in 2026, NVIDIA continues to command approximately 80% of the data center GPU market, though competitive pressures are intensifying from multiple directions.

Rubin vs. Blackwell: What the Generational Leap Means for AI Development

The performance improvements from Blackwell to Rubin are not merely incremental – they are transformative for the types of AI workloads that become economically viable. Understanding what this generational leap enables requires looking beyond benchmark numbers to the practical implications for AI model development and deployment.

The 2.75x increase in memory bandwidth (from 8 TB/s to 22 TB/s) is perhaps the most consequential improvement. Modern large language models are increasingly memory-bandwidth-bound rather than compute-bound, particularly during inference. The Rubin architecture’s 22 TB/s HBM4 bandwidth means that models with trillions of parameters can be served with significantly lower latency, directly translating to better user experiences and lower cost-per-token for AI service providers.

The 50% increase in HBM capacity (from 192GB to 288GB per GPU) enables larger model shards per GPU, reducing the number of GPUs required for a given model size. For a 1-trillion parameter model in FP8, this means going from requiring 32 Blackwell GPUs to approximately 22 Rubin GPUs for inference – a 31% reduction in hardware requirements that translates directly to cost savings.

The implications extend to training as well. The 35 PFLOPS of FP4 training performance, combined with the third-generation Transformer Engine’s adaptive compression, means that models that previously required months of training on Blackwell clusters can potentially be trained in weeks on equivalent Rubin configurations. This acceleration of the training cycle has profound implications for the pace of AI research and the competitive dynamics between AI labs like OpenAI, Anthropic, Google DeepMind, and Meta AI. For a deeper comparison of the models these chips power, see our analysis of GPT-5.4 vs Claude Opus 4.6 vs DeepSeek V4 vs Gemini 3.1.

April 2026 Confirmed Specifications: 336B Transistors and 50 PFLOPS

NVIDIA’s April 2026 GTC disclosures locked in the headline Rubin specs that had been in flux since CES: 336 billion transistors, 50 PFLOPS of performance per GPU, and 288GB of HBM4 memory. These are the baseline figures every customer and competitor will now model against. Hitting 50 PFLOPS at production yields on a dual-die 3nm package is what enables the rack-scale ratios being quoted for the VR200 NVL72 – individual chip capability is what compounds into aggregate rack advantage, and Rubin’s per-GPU numbers are the foundation of every downstream comparison.

Market Impact: NVIDIA’s Stock, Revenue Projections, and Investor Sentiment

NVIDIA GTC has historically been a market-moving event, and the 2026 edition carries even greater weight. The company’s stock has been on a volatile trajectory through early 2026 as investors weigh the massive demand for AI compute against concerns about the sustainability of capital expenditure cycles and the emergence of alternative architectures.

👁 Market Impact: NVIDIA's Stock, Revenue Projections, and Investor Sentiment

Several factors make the NVIDIA GTC 2026 announcements particularly significant for investors. First, the Rubin production ramp provides visibility into 2026-2027 revenue. With an estimated 200,000-300,000 GPUs at expected ASPs significantly above Blackwell’s pricing, the revenue contribution from Rubin alone could represent tens of billions of dollars. Analysts have noted that the production constraint acts as both a ceiling on near-term revenue and a floor on pricing power.

Second, the NVL72 and NVL576 rack-scale solutions represent a strategic shift toward higher-value, integrated system sales. Rather than selling individual GPUs, NVIDIA is increasingly selling complete AI factory solutions with recurring software revenue through CUDA, NIM microservices, and enterprise AI platforms. This transition from component vendor to platform provider carries significant margin expansion potential.

Third, the roadmap visibility is critical. With Rubin Ultra confirmed for 2027 (featuring approximately 500 billion transistors, 384GB HBM4E, and 32 TB/s bandwidth), investors can model a multi-year upgrade cycle that extends NVIDIA’s competitive moat. The GTC 2026 conference provides the data points needed to underwrite these projections with confidence.

The NVIDIA Blackwell GPU pricing structure provides important context for understanding Rubin’s expected price positioning and the margin dynamics at play.

Competitive Implications: AMD, Intel, and Custom Silicon Respond

NVIDIA’s Rubin announcements at GTC 2026 do not exist in a vacuum. The competitive landscape for AI accelerators has never been more dynamic, and every Rubin specification carries implications for rival chipmakers and custom silicon programs.

AMD’s Strategic Counterplay

AMD has been making aggressive moves to challenge NVIDIA’s dominance. The company announced EPYC “Venice” server CPUs and has supply agreements with both Meta and OpenAI for AI chips. The MI450 GPU, designed to pair with Venice CPUs in AI racks, represents AMD’s most ambitious data center GPU yet. However, AMD faces a fundamental challenge: NVIDIA’s CUDA ecosystem and NVLink networking create switching costs that make it difficult for customers to diversify their GPU fleet, even when AMD offers competitive price-performance.

AMD’s Q1 2026 chip supply and equity option deal with Meta signals a strategic shift. Rather than competing purely on specifications, AMD is offering strategic partnerships that include equity stakes and guaranteed supply commitments – a recognition that in a supply-constrained market, availability can matter as much as performance.

Custom Silicon from Hyperscalers

Perhaps the most significant competitive threat to NVIDIA comes from the hyperscalers themselves. Meta’s third-generation custom silicon MTIA v3, codenamed “Iris,” entered broad data center deployment in February 2026. Built on TSMC 3nm with Broadcom’s assistance, Iris features eight HBM3E 12-high stacks and delivers over 3.5 TB/s of memory bandwidth. Meta’s roadmap includes MTIA-2 in H1 2026, MTIA-3 in H2 2026, and the “Arke” inference chip developed with Marvell.

Google’s TPU v6 (Trillium), Amazon’s Trainium3, and Microsoft’s Maia 2 represent similar in-house silicon efforts. Each of these chips is optimized for the specific inference and training workloads that dominate their respective cloud platforms. While none individually match Rubin’s raw performance, they offer hyperscalers lower total cost of ownership for their specific use cases and reduce dependency on NVIDIA’s supply allocation.

The dynamics of NVIDIA’s chip supply deals are well illustrated by ByteDance’s $2ByteDance has secured a major NVIDIA chip deal through its Malaysian data center expansion, part of a broader multi-billion-dollar AI infrastructure buildout in Southeast Asia.

The Power and Cooling Challenge: How Rubin Reshapes Data Center Infrastructure

One of the most underappreciated aspects of the NVIDIA GTC 2026 announcements is the infrastructure transformation required to deploy Rubin at scale. With individual GPUs consuming approximately 2,300W – nearly double Blackwell’s 1,200W – and NVL72 racks drawing 120-130 kW, the Rubin platform demands a fundamental rethinking of data center power and cooling infrastructure.

👁 The Power and Cooling Challenge: How Rubin Reshapes Data Center Infrastructure

The NVL576 configuration, at an estimated 600 kW per rack, pushes beyond what traditional air-cooled data centers can handle. Advanced liquid cooling – including direct-to-chip and immersion cooling solutions – becomes mandatory, not optional. This requirement is driving a surge in demand for liquid cooling infrastructure from companies like Vertiv, Schneider Electric, and CoolIT Systems.

The power requirements also have macroeconomic implications. Deploying 5 GW of AI processing capacity by the end of the decade requires not just data center construction but new power generation capacity. This has led to a renaissance in nuclear energy planning, with several hyperscalers announcing partnerships with nuclear power providers. Natural gas peaker plants, small modular reactors (SMRs), and even geothermal energy projects are being pursued to meet the power demands of next-generation AI infrastructure.

For data center operators, the calculus is straightforward but challenging: a single NVL576 rack requires more power than an average American house consumes in a year, concentrated in approximately 40 square feet of floor space. The revenue potential justifies the investment – a fully utilized NVL576 rack can generate millions of dollars in annual inference revenue – but the upfront capital requirements and lead times for power infrastructure create significant barriers to entry.

Software Ecosystem: CUDA, NIM, and the Platform Lock-In Strategy

While hardware specifications dominate the headlines, NVIDIA’s software ecosystem remains its most durable competitive advantage. GTC 2026 features more than 700 sessions covering CUDA optimization, AI model deployment, and enterprise integration – reflecting the depth of NVIDIA’s software platform.

The CUDA ecosystem, now in its 18th year, has accumulated a massive library of optimized kernels, frameworks, and tools that make NVIDIA GPUs the default choice for AI development. The third-generation Transformer Engine in Rubin uses CUDA-X libraries to automatically select optimal precision formats (FP4, FP8, FP16, BF16) based on workload characteristics, maximizing both performance and accuracy without requiring manual tuning by developers.

NVIDIA’s NIM (NVIDIA Inference Microservices) platform represents a strategic push into software revenue. NIM provides pre-optimized containers for deploying popular AI models on NVIDIA hardware, reducing the engineering effort required to move from research to production. At NVIDIA GTC 2026, expanded NIM support for Rubin-optimized inference is expected to be a major theme, with new microservices targeting agentic AI, multimodal models, and physical AI applications.

Full-day technical workshops at the NVIDIA conference 2026 cover multimodal AI agents and accelerated networking for AI infrastructure, reflecting the shift from pure compute to system-level optimization. The emphasis on agentic AI – autonomous software systems that can plan, reason, and execute complex tasks – aligns with broader industry trends toward AI systems that go beyond simple prompt-response interactions. Our coverage of how AI agents are reshaping enterprise provides additional context on this transformation.

# Example: Deploying a Rubin-optimized inference endpoint with NVIDIA NIM
# NIM containers auto-detect Rubin GPU capabilities and optimize accordingly

docker pull nvcr.io/nvidia/nim/llama-3.2-70b:rubin-optimized

docker run --gpus all 
 -e NIM_MODEL_PROFILE=rubin-fp4 
 -e NIM_MAX_BATCH_SIZE=256 
 -e NIM_TENSOR_PARALLEL=4 
 -p 8000:8000 
 nvcr.io/nvidia/nim/llama-3.2-70b:rubin-optimized

# Rubin's FP4 Transformer Engine enables 2.5x higher throughput
# compared to Blackwell FP8 deployment at equivalent accuracy

Robotics and Physical AI: NVIDIA’s Next Growth Frontier

Robotics and physical AI emerged as a dominant theme at NVIDIA GTC 2026, signaling the company’s strategic expansion beyond data center compute into embodied intelligence. Jensen Huang has repeatedly stated that the next wave of AI will move beyond digital systems into the physical world, and the GTC 2026 conference program reflects this vision with extensive coverage of end-to-end robotics workflows.

👁 Robotics and Physical AI: NVIDIA's Next Growth Frontier

NVIDIA’s robotics platform uses the same Rubin and Vera silicon that powers data center AI but applies it to simulation, training, and deployment of robotic systems. The company’s Omniverse simulation platform enables developers to create digital twins of physical environments, train robot policies in simulation, and deploy them to real-world hardware with minimal domain gap.

The addressable market for AI-powered robotics is enormous. Manufacturing, logistics, healthcare, agriculture, and construction are all sectors where autonomous systems can deliver transformative productivity gains. NVIDIA’s strategy is to position itself as the platform provider for this ecosystem, selling Jetson modules for edge deployment and data center GPUs for training – capturing value across the entire robotics development lifecycle.

The sustainability implications extend beyond just power consumption. Nvidia partnered with Equinix and Digital Realty to develop liquid cooling standards for Rubin-class data centers, with the goal of achieving a Power Usage Effectiveness (PUE) of 1.15 or lower – meaning only 15% of total facility power goes to cooling and overhead. For comparison, traditional air-cooled data centers typically operate at PUE values of 1.4 to 1.6. The industry-wide shift to liquid cooling, driven largely by Rubin’s 2,300W TDP, represents a fundamental change in data center design that will affect every hardware vendor and facility operator. The autonomous driving segment also featured prominently at the NVIDIA conference 2026. With the DRIVE platform now deployed by multiple automakers for advanced driver-assistance systems (ADAS) and autonomous driving development, NVIDIA is building a recurring revenue stream in the automotive sector. The Rubin architecture’s improved inference performance directly benefits autonomous driving applications, where low-latency processing of sensor data is safety-critical.

What to Watch Next: Rubin Ultra, Industry Adoption, and the Road to 2027

As NVIDIA GTC 2026 unfolds over four days, several key developments deserve close attention from industry observers, investors, and technologists.

Rubin Ultra timeline and specifications. NVIDIA has confirmed Rubin Ultra for 2027 with approximately 500 billion transistors, 384GB of HBM4E memory, and 32 TB/s bandwidth. GTC 2026 may provide additional details on expected performance improvements, manufacturing partners, and customer commitments for the Ultra variant. The Rubin Ultra NVL576 at an estimated 600 kW per rack will push the boundaries of what is physically possible in a data center environment.

Customer adoption announcements. Watch for specific deployment commitments from hyperscalers and cloud service providers. The transition from Blackwell to Rubin represents a massive capital reallocation, and the pace of this transition will determine NVIDIA’s revenue trajectory through 2027. Companies that have already secured Rubin allocation will have a significant competitive advantage in offering next-generation AI services.

Competitive responses. AMD, Intel, and the custom silicon programs at hyperscalers will need to respond to Rubin’s specifications. AMD’s MI450 launch timeline and performance benchmarks will be critical data points. Intel’s Gaudi 3 and the rumored Falcon Shores accelerator face an even steeper climb to relevance. The open-source AI ecosystem, which is closing the gap with proprietary models, could influence chip demand patterns as well.

Power and cooling infrastructure partnerships. As Rubin drives data center power requirements to new highs, partnerships between NVIDIA and energy providers, cooling technology companies, and data center operators will shape the infrastructure buildout. The 5 GW deployment target requires coordination across the entire value chain.

Software ecosystem expansion. The evolution of CUDA, NIM, and NVIDIA’s enterprise AI platforms will determine the stickiness of NVIDIA’s competitive moat. Expanded support for agentic AI workloads, multimodal inference, and physical AI applications could open new revenue streams and market opportunities.

The Feynman architecture. Looking beyond Rubin and Rubin Ultra, NVIDIA has teased the Feynman architecture as the subsequent generation. Industry analysts at Tom’s Hardware and HPCwire have speculated that Feynman could introduce optical interconnects at the rack level, potentially replacing electrical NVLink connections with silicon photonics for dramatically lower latency at scale. Any details shared at GTC 2026 about Feynman’s timeline, target specifications, or manufacturing process would provide valuable long-term roadmap visibility.

Rubin Ultra vs Blackwell Ultra vs H200: Full Specifications Comparison

Understanding Nvidia’s GPU generational progression requires a detailed specifications comparison across the three most recent architecture families: Hopper (H200), Blackwell (B200/B300), and the newly announced Rubin (R100). Each generation represents a substantial leap in transistor density, memory bandwidth, and inference throughput – with Rubin delivering the largest generational improvement Nvidia has shipped since the original Volta architecture introduced Tensor Cores in 2017.

Specification	H200 (Hopper)	B200 / B300 (Blackwell)	R100 (Rubin)	Rubin Ultra (2027)
Process Node	TSMC 4N	TSMC 4NP	TSMC N3/N3P	TSMC N3P (enhanced)
Transistor Count	80 billion	208 billion	336 billion	~500 billion (est.)
Die Design	Monolithic	Dual-die	Dual-die	Dual-die (originally quad-die)
HBM Type	HBM3e	HBM3e	HBM4	HBM4E
Memory Capacity	141 GB	192 GB	288 GB	384 GB
Memory Bandwidth	4.8 TB/s	8 TB/s	22 TB/s	32 TB/s (est.)
FP4 Inference (PFLOPS)	N/A	~20	50	~75 (est.)
FP64 Matrix (TFLOPS)	67	~150	200	~300 (est.)
Tensor Core Generation	4th Gen	5th Gen	6th Gen	6th Gen (enhanced)
Transformer Engine	2nd Gen	2nd Gen	3rd Gen (NVFP4)	3rd Gen (enhanced)
NVLink Generation	NVLink 4	NVLink 5	NVLink 6	NVLink 7
TDP	~700W	~1,000W	1,800-2,300W	~2,500W (est.)
Rack Config	DGX H200	DGX B200 / NVL72	NVL72 / NVL144	NVL576 (Kyber)
Availability	Shipping	Shipping (lead time 18 weeks)	Sampling Q4 2026	Expected 2027

The generational improvements from Hopper to Rubin are staggering by any measure. Rubin’s 288 GB of HBM4 memory represents a 2x increase over H200 and a 50% increase over Blackwell, while the memory bandwidth leap from 4.8 TB/s (H200) to 22 TB/s (Rubin) represents a 4.6x improvement in just two generations. This bandwidth increase is particularly significant for large language model inference, where the rate at which model weights can be moved from memory to compute units is the primary performance bottleneck. Micron has confirmed high-volume production of HBM4 36 GB modules with a 2.3x bandwidth improvement over previous generations, specifically designed for the Rubin architecture.

The Rubin Ultra, initially planned as a four-die design, was reportedly scaled back to a dual-die configuration due to yield challenges at TSMC’s CoWoS-L advanced packaging facility. Despite this redesign, Nvidia claims the dual-die Rubin Ultra will still deliver a 3.5x improvement in inference throughput per watt over current Blackwell B300 configurations – a metric that matters enormously for data center operators paying electricity bills measured in millions of dollars per month. The Kyber rack architecture designed for Rubin Ultra will support 144 GPUs in vertical configurations with NVLink 7.0, delivering 14.4 Tbit/s of uni-directional bandwidth per logical GPU.

GTC 2026 Software Announcements: CUDA, NIM, and Omniverse

While hardware announcements dominate the headlines, Nvidia’s software ecosystem is increasingly the foundation of its competitive moat. GTC 2026 delivered several significant software platform updates that extend Nvidia’s reach beyond silicon into the software infrastructure that runs on it – a strategy that locks in customers through toolchain dependency while providing genuine developer productivity improvements.

CUDA ecosystem evolution. Nvidia’s CUDA platform, which has accumulated over 5 million developers since its 2007 launch, remains the dominant GPU programming framework by a wide margin. At GTC 2026, Nvidia emphasized full backward compatibility – existing CUDA applications will run on Rubin hardware without modification, protecting the massive investment organizations have made in CUDA-optimized code. The Rubin architecture introduces hardware-level support for NVFP4 (Nvidia’s custom 4-bit floating point format) through the third-generation Transformer Engine, enabling automatic mixed-precision training and inference that delivers up to 2x throughput improvement over FP8 operations with negligible accuracy loss for transformer-based models.

NIM (Nvidia Inference Microservices). NIM has emerged as Nvidia’s primary strategy for making AI deployment accessible to enterprise customers who lack deep ML engineering expertise. NIM packages optimized AI models into standard container images that deploy with a single Docker command, abstracting away the complexity of model optimization, quantization, and serving infrastructure. At GTC 2026, Nvidia announced expanded NIM support for multimodal models, including vision-language models and audio processing pipelines. The NIM catalog now includes over 50 pre-optimized models from leading AI labs, and enterprise customers report 3x faster time-to-production compared to manual model deployment on bare Nvidia hardware.

Dynamo inference orchestration. Perhaps the most technically significant software announcement at GTC 2026 was Dynamo, a new inference orchestration framework designed for disaggregated AI pipelines. Dynamo separates the prefill phase (processing input tokens) from the decode phase (generating output tokens) of language model inference, routing each phase to the most efficient hardware. In Nvidia’s demonstration, prefill operations ran on Vera CPUs while decode operations ran on Rubin GPUs, achieving a 35x improvement in tokens per watt compared to running the entire pipeline on GPUs alone. This disaggregated approach is particularly relevant for agentic AI workloads – systems that perform multi-step reasoning and tool use – where inference latency and cost per token are the primary scaling constraints.

Omniverse and physical AI. Nvidia’s Omniverse platform, designed for building and simulating physically accurate digital twins, received updates focused on robotics and industrial simulation. The integration with the Isaac Sim robotics platform now supports real-time training of robot policies in Omniverse environments that transfer directly to physical hardware – a “sim-to-real” pipeline that major manufacturers including Foxconn and Siemens are deploying for factory automation. The Rubin architecture’s improved inference latency directly benefits Omniverse’s real-time rendering pipeline, enabling more complex simulations at interactive frame rates. Nvidia also expanded its partnership with Microsoft to integrate Omniverse with Azure Digital Twins, enabling manufacturers to deploy Omniverse-powered factory simulations directly in their existing Azure cloud infrastructure without dedicated on-premises GPU hardware.

AI Infrastructure Pricing: What Rubin GPUs Will Cost

Nvidia has not disclosed per-GPU pricing for the Rubin R100, but analysis of the company’s pricing history, supply chain data, and customer announcements provides a reasonable range for infrastructure planning. The AI accelerator market in 2026 operates under significant supply constraints, and pricing reflects not just manufacturing costs but the enormous demand-supply imbalance that has persisted since the ChatGPT-driven AI infrastructure buildout began in late 2022.

Configuration	Estimated Price Range	Key Specifications
Rubin R100 (Single GPU)	$40,000 – $60,000	336B transistors, 288 GB HBM4, 50 PFLOPS FP4
DGX Rubin (8x R100)	$350,000 – $500,000	8 GPUs, 2.3 TB HBM4, NVLink 6 interconnect
NVL72 Rack (72x R100)	$3,500,000 – $4,000,000	72 GPUs, 36 Vera CPUs, 20.7 TB HBM4, liquid cooled
NVL72 Supercomputer (18 racks)	$60,000,000 – $70,000,000	1,296 GPUs, 640 TB HBM4, 3.6 EFLOPS inference
Blackwell B300 (for comparison)	$30,000 – $40,000	208B transistors, 192 GB HBM3e
H200 (for comparison)	$25,000 – $35,000	80B transistors, 141 GB HBM3e

These estimates are derived from multiple data points. Jensen Huang confirmed $1 trillion in combined Blackwell and Vera Rubin purchase orders through 2027, with Nebius Group alone announcing a $27 billion infrastructure deal with Meta that includes $12 billion in dedicated Vera Rubin capacity. At these deal sizes, volume pricing is substantially lower than list pricing – hyperscalers like Meta, Microsoft, Amazon, and Google negotiate multi-year purchase agreements that reduce per-GPU costs by 15 to 25% compared to what smaller customers pay.

For organizations evaluating Rubin economics, the relevant metric is not per-GPU cost but cost per inference token or cost per training FLOP. Nvidia’s claim that the Rubin platform targets a 10x inference cost reduction over previous generations, if validated in production, would make Rubin the most cost-effective AI accelerator ever produced on a per-operation basis – despite its higher absolute price point. Early benchmarks from the Vera Rubin platform suggest that rack-scale configurations can achieve inference costs in the range of $45 to $150 per million tokens for large language models, competitive with or below the rates that major cloud providers charge today. For AI infrastructure buyers, the key questions are: what is your expected inference volume over the next 3 years, and at what point does owning Rubin hardware become cheaper than renting cloud GPU time?

The secondary market for AI accelerators adds another pricing dimension. Used H100 GPUs are now trading at 40 to 50% of original list price as organizations prepare for Blackwell and Rubin upgrades, creating opportunities for budget-conscious AI teams to acquire previous-generation hardware at significant discounts. However, the efficiency gap between generations means that total cost of ownership (including power and cooling) often favors newer hardware even at higher purchase prices. A Rubin R100 that delivers 5x the inference throughput of an H100 at 3.3x the power consumption translates to a 50% reduction in cost per inference operation – a calculation that makes upgrading economically rational for any organization with sustained inference workloads. The datacenter GPU market is increasingly following a pattern similar to the consumer GPU market: rapid depreciation of older generations as new architectures deliver substantial efficiency improvements, creating a predictable upgrade cycle for infrastructure buyers.

10x Cheaper Tokens: What Rubin Does to Agentic and MoE Economics

The most consequential April 2026 pricing data point is not the per-GPU sticker – it is the per-token cost trajectory. NVIDIA stated that token costs for agentic AI, advanced reasoning, and hyper-scale Mixture-of-Experts (MoE) inference will drop to one-tenth that of the Blackwell platform on Rubin. On the training side, MoE model training on Rubin will require only one-quarter the number of GPUs compared to the previous generation. For anyone modeling multi-year inference budgets or planning a frontier MoE training run, those two ratios reshape the total cost curve far more than the absolute GPU purchase price does – and they are the numbers most likely to drive Rubin allocation decisions through 2027.

Frequently Asked Questions: Nvidia GTC 2026 and Rubin

GTC 2026 generated enormous interest from investors, engineers, and enterprise technology leaders. Here are answers to the eight most common questions about the conference, the Rubin architecture, and what it means for the AI industry.

When will Nvidia Rubin GPUs be available to buy?

The Rubin R100 GPU is sampling with select customers in Q4 2026, with volume production beginning Q1 2027. The full Vera Rubin platform (GPU + Vera CPU + NVLink 6 rack infrastructure) is shipping to early access customers in H2 2026. Hyperscalers like Meta, Microsoft, and Google have already secured allocation. For enterprise customers outside the hyperscaler tier, availability through cloud providers (AWS, GCP, Azure) is expected by mid-2027. Expect lead times of 18 to 24 weeks at launch – similar to the early Blackwell availability window.

How much faster is Rubin compared to Blackwell?

Rubin delivers 2.5x to 5x improvement in inference throughput over Blackwell depending on the workload, and a 3.5x improvement in training throughput. Memory bandwidth increases from 8 TB/s (Blackwell) to 22 TB/s (Rubin) – a 2.75x improvement that directly benefits memory-bound workloads like large language model inference. The third-generation Transformer Engine with NVFP4 provides additional efficiency gains for transformer-based architectures specifically.

What happened to the four-die Rubin Ultra design?

The Rubin Ultra was reportedly scaled back from a four-die to a dual-die design due to yield challenges at TSMC’s CoWoS-L advanced packaging. Industry sources suggest the interconnect bandwidth between four dies could not meet Nvidia’s latency targets for inference workloads. Despite the redesign, Nvidia claims the dual-die Rubin Ultra will still deliver 3.5x inference throughput per watt over Blackwell B300, with approximately 500 billion transistors, 384 GB of HBM4E memory, and 32 TB/s bandwidth. Rubin Ultra is expected in 2027.

What is the Vera CPU announced at GTC 2026?

Vera is Nvidia’s custom CPU designed to pair with the Rubin GPU in integrated AI rack systems. It features 72 Arm-based Grace cores optimized for AI data preprocessing, KV cache management, and prefill operations in disaggregated inference pipelines. The Vera CPU + Rubin GPU combination is sold as the Vera Rubin platform, packaged in NVL72 rack configurations containing 72 Rubin GPUs and 36 Vera CPUs. Vera replaces the Grace CPU in the DGX product line, providing purpose-built CPU capabilities for AI factory workloads.

What is Nvidia Dynamo and why does it matter?

Dynamo is Nvidia’s new inference orchestration framework that enables disaggregated AI pipelines. It separates prefill (processing input tokens on Vera CPUs) from decode (generating output tokens on Rubin GPUs), achieving a claimed 35x improvement in tokens per watt. This is particularly significant for agentic AI workloads – systems that perform multi-step reasoning, tool use, and autonomous task execution – where inference cost per token is the primary scaling constraint. Dynamo represents Nvidia’s recognition that the future of AI compute is not just raw GPU performance but intelligent orchestration across heterogeneous hardware.

Will my existing CUDA code work on Rubin?

Yes. Nvidia has maintained full backward compatibility across all CUDA generations since the platform’s launch in 2007. Existing CUDA applications will run on Rubin hardware without source code modifications. The Rubin architecture adds new capabilities (NVFP4 precision, third-gen Transformer Engine, enhanced simultaneous multithreading) that applications can opt into for additional performance, but these are additive – nothing breaks. This backward compatibility is the foundation of Nvidia’s platform lock-in strategy and a key reason organizations continue to invest in the CUDA ecosystem despite competition from AMD’s ROCm and Intel’s oneAPI.

How does Rubin compare to AMD and Intel’s competing chips?

AMD’s MI450 is the closest competitor, targeting a similar Q1 2027 launch window. However, AMD has not disclosed MI450 specifications at the level of detail Nvidia has provided for Rubin. Intel’s Gaudi 3 and the rumored Falcon Shores accelerator face a steeper competitive challenge, as Intel has struggled to gain meaningful market share in AI training accelerators. Custom silicon from hyperscalers – Google’s TPU v6, Amazon’s Trainium2, and Meta’s MTIA v2 – compete in specific workloads but cannot match Nvidia’s general-purpose GPU programmability. In 2026, Nvidia commands approximately 80% market share in AI training accelerators, and Rubin’s specifications suggest that lead will extend rather than narrow. The open-source AI movement adds a wildcard to the competitive landscape: as models like Llama, Mistral, and DeepSeek become increasingly competitive with proprietary offerings, the total addressable market for inference compute is expanding faster than the training compute market. Nvidia’s NIM microservices strategy positions it to capture this inference demand, but AMD’s ROCm compatibility with popular inference frameworks (vLLM, TensorRT-LLM via conversion tools) is improving, and some cost-sensitive inference deployments are beginning to evaluate AMD MI300X as a lower-cost alternative for serving open-source models.

What comes after Rubin in Nvidia’s GPU roadmap?

Nvidia has teased the Feynman architecture as the successor to Rubin and Rubin Ultra. Feynman has been referenced in connection with the NVL1152 multi-rack configuration with NVLink 7.0 networking, suggesting a continued focus on rack-scale and cluster-scale AI compute. Specific Feynman specifications have not been disclosed, but the architecture is expected to debut in 2028, following Nvidia’s annual GPU architecture cadence that Jensen Huang has committed to maintaining. The progression from Blackwell (2024) to Rubin (2026) to Feynman (2028) suggests Nvidia is on a two-year major architecture cycle with annual updates (Ultra variants) between generations.

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The Bottom Line: GTC 2026 Cements NVIDIA’s AI Infrastructure Dominance

NVIDIA GTC 2026 arrives at a pivotal moment for the entire technology industry. The Rubin GPU architecture represents not just a product upgrade but a platform shift that will influence how AI is developed, deployed, and monetized for the next several years. With 336 billion transistors, 288GB of HBM4 memory, and 50 petaflops of inference performance per chip, Rubin delivers the kind of generational leap that forces every competitor, customer, and investor to recalibrate their models.

The conference’s 30,000 attendees from 190 countries, 700+ sessions, and 10 venues across San Jose reflect the scale of NVIDIA’s influence on the AI ecosystem. From rack-scale compute (NVL72, NVL144, NVL576) to integrated CPU-GPU platforms (Vera+Rubin) to software infrastructure (CUDA, NIM) to emerging domains (robotics, autonomous driving), NVIDIA is executing on a vision of end-to-end AI infrastructure that no competitor can currently match in breadth or depth.

For enterprise technology leaders, the message from NVIDIA GTC 2026 is clear: the pace of AI hardware improvement is accelerating, not slowing. The companies that secure access to Rubin-class compute first will have a meaningful advantage in deploying next-generation AI applications. For investors, the Rubin production ramp, Rubin Ultra roadmap, and expanding software revenue streams provide a multi-year growth narrative. And for the broader AI research community, the raw capability of Rubin hardware means that the computational constraints on AI development continue to relax, enabling experiments and architectures that were impractical just 12 months ago.

As Jensen Huang takes the stage at the SAP Center today, the question is not whether NVIDIA will deliver impressive technology – that much is certain. The real question is whether the AI infrastructure buildout can scale fast enough to meet demand, and whether NVIDIA can maintain its commanding position as competitors intensify their efforts. GTC 2026 will provide important answers to both questions, but based on what we have seen so far, NVIDIA’s lead appears as durable as ever.

For enterprise buyers and data center operators, the actionable takeaways from GTC 2026 are clear. First, begin planning Rubin infrastructure deployments now – lead times will be 18 to 24 weeks at launch, and organizations that wait until production availability to place orders will face significant delays. Second, evaluate whether your current workloads can benefit from disaggregated inference via Dynamo, as the efficiency gains are substantial for large language model serving. Third, factor liquid cooling requirements into data center capacity planning – Rubin’s 2,300W TDP makes air cooling impractical, and the transition to liquid cooling requires facility modifications that take 6 to 12 months to implement. Finally, consider the total cost of ownership rather than per-GPU price: Rubin’s inference efficiency improvements mean that fewer GPUs serve more requests, potentially reducing total rack count even as per-GPU costs increase.

This article was published on March 16, 2026. NVIDIA GTC 2026 runs through March 19 in San Jose, California. We will update this analysis as additional announcements are made during the conference. For further reading on the AI chip market, visit our AI Chips 2026 guide and NVIDIA’s official GTC page.

Frequently Asked Questions

When was Nvidia GTC 2026 held?

NVIDIA GTC 2026 was held from March 16 to March 19, 2026, in San Jose, California. The event featured 30,000 attendees from 190 countries across 10 venues in downtown San Jose. Jensen Huang delivered the keynote address at the SAP Center on March 16, running from 11 a.m. to 1 p.m. Pacific Time, with a pregame show starting at 8 a.m. The conference included over 700 sessions covering AI, robotics, autonomous systems, and enterprise computing.

What is the Nvidia Rubin GPU?

The Nvidia Rubin GPU is NVIDIA’s next-generation AI accelerator built on TSMC’s 3nm process. It features a dual-die design with 336 billion transistors, 288GB of HBM4 memory delivering 22 TB/s of bandwidth, and 50 petaflops of FP4 inference performance per chip. The Rubin GPU is part of the larger Vera Rubin platform, which includes the Vera CPU (88 custom Olympus ARM cores), NVLink 6 interconnect, and supporting networking silicon. It represents a generational leap over the Blackwell architecture with 2.5-5x improvements in inference throughput and 3.5x improvements in training performance.

How much will Nvidia Rubin GPUs cost?

NVIDIA has not disclosed individual Rubin GPU pricing. However, based on the Blackwell pricing trajectory and industry analysis, DGX Rubin rack configurations are expected to cost $3.5 to $4 million per rack. The flagship NVL72 rack packages 72 Rubin GPUs and 36 Vera CPUs in a fully liquid-cooled enclosure. For comparison, Blackwell B200 GPUs have an estimated ASP of $30,000-$40,000 each, and Rubin is expected to command a premium above that. Cloud providers will offer Rubin-based instances, making the technology accessible without upfront hardware purchases.

What is the difference between Rubin and Blackwell?

The Rubin architecture delivers transformative improvements over Blackwell across every dimension. Transistor count increases from 208 billion to 336 billion (1.6x). Memory bandwidth jumps from 8 TB/s to 22 TB/s (2.75x) with the move from HBM3e to HBM4. HBM capacity grows from 192GB to 288GB (1.5x). FP4 inference performance reaches 50 petaflops versus Blackwell’s 10-20 petaflops (2.5-5x). NVLink bandwidth doubles from 1.8 TB/s to 3.6 TB/s per GPU. The Vera Rubin NVL72 rack delivers approximately 10x higher inference throughput per watt and can train large models with one-quarter the GPU count compared to Blackwell equivalents.

When will Nvidia Rubin GPUs be available?

NVIDIA confirmed that Rubin R100 GPUs will begin sampling in Q4 2026, with volume production starting in Q1 2027. Vera CPUs are already in full production for second-half 2026 availability. The Vera Rubin platform (including NVL72 racks) is shipping to select customers in H2 2026, with CoreWeave among the early deployment partners. Blackwell B300 lead times have dropped from 36 weeks to 18 weeks as demand stabilizes ahead of the Rubin transition. The Rubin Ultra variant is confirmed for 2027 with approximately 500 billion transistors and 384GB of HBM4E memory.

What software was announced at GTC 2026?

GTC 2026 featured significant software announcements alongside the hardware reveals. NVIDIA expanded its NIM (NVIDIA Inference Microservices) platform with Rubin-optimized containers for deploying popular AI models. The Dynamo intelligent scheduling system enables transparent workload offloading between Rubin GPUs and Groq LPUs without requiring CUDA code changes. NVIDIA Omniverse DSX Blueprint reached general availability for AI infrastructure simulation. The conference showcased expanded support for agentic AI workflows, multimodal inference, and physical AI applications. Over 700 sessions covered CUDA optimization, AI model deployment, reinforcement learning on Vera CPU racks, and enterprise integration patterns.

April 2026 Update: Vera Rubin Ships, $1 Trillion in Orders Confirmed

Updated April 6, 2026

NVIDIA’s GTC 2026 keynote on March 16 delivered even bigger announcements than anticipated. Jensen Huang confirmed $1 trillion in combined Blackwell and Vera Rubin purchase orders through 2027, signaling unprecedented demand for AI infrastructure. The Vera Rubin platform, unveiled as a rack-scale supercomputer purpose-built for agentic AI, has already secured commitments from every major cloud provider.

The Rubin GPU’s specifications are staggering: 336 billion transistors, 288 GB of HBM4 memory, and 50 petaflops of FP4 inference performance. The flagship NVL72 rack configuration packages 72 Rubin GPUs and 36 Vera CPUs in a fully liquid-cooled enclosure exceeding 200 kW per rack. Nebius Group announced a $27 billion infrastructure deal with Meta, including $12 billion in dedicated Vera Rubin capacity – one of the largest single AI hardware commitments ever made.

On the memory front, Micron confirmed high-volume production of HBM4 36 GB modules with a 2.3x bandwidth improvement over previous generations, specifically designed for the Rubin architecture. NVIDIA also previewed Kyber, the next-generation rack architecture after Rubin, integrating 144 GPUs in vertical configurations. Vera Rubin is shipping to customers in H2 2026, with CoreWeave planning production deployment of Vera CPU racks in the same timeframe. The roadmap from chip-level to infrastructure-level competition is now NVIDIA’s defining strategy.

Full Production Confirmed: What Vera Rubin’s Ramp Means for AI Economics

As of April 2026, the Vera Rubin platform has moved beyond sampling into full production as a six- or seven-chip integrated system – a milestone that accelerates the timeline for enterprise deployment. The platform combines the Rubin GPU’s 336 billion transistors, 288GB HBM4 memory, and 50 PFLOPS NVFP4 inference performance with the Vera CPU, NVLink 6 interconnect, and supporting DPU and NIC silicon into a single cohesive rack-scale product. Full production status means NVIDIA’s supply chain partners – TSMC for advanced packaging, SK Hynix and Micron for HBM4 – have cleared the yield hurdles that delayed earlier Blackwell ramps, positioning Vera Rubin for volume shipments through H2 2026 and into 2027.

The economic case for Vera Rubin has sharpened considerably since the initial GTC 2026 announcements. The Vera Rubin NVL72 – packaging 72 Rubin GPUs and 36 Vera CPUs in a single liquid-cooled rack – now delivers up to 10x higher inference throughput per watt compared to equivalent Blackwell configurations. For hyperscalers running inference at scale, where electricity costs can exceed $2 million per rack per year, a 10x efficiency gain translates directly into hundreds of millions of dollars in annual operating savings across fleet-wide deployments. Equally significant for AI labs: NVIDIA claims Vera Rubin can train large models with one-fourth the GPU count required by Blackwell. A training run that previously demanded 4,096 Blackwell GPUs could theoretically complete on approximately 1,024 Rubin GPUs – reducing not just hardware costs but the power, cooling, and data center footprint required for frontier model development.

$1 Trillion Demand Signal: Why Jensen Huang Doubled His Forecast

At GTC DC in late March 2026, Jensen Huang revised NVIDIA’s AI infrastructure demand projection to $1 trillion through 2027 – a figure that doubled the company’s prior estimate. The upward revision reflects three converging forces. First, the inference market is growing faster than training: as enterprises deploy AI agents, recommendation systems, and real-time language models into production, the compute required for serving these models at scale is outpacing the compute used to train them. NVIDIA’s internal data suggests inference now accounts for over 60% of GPU-hours consumed across its customer base, up from roughly 40% in early 2025.

Second, the Vera Rubin full-stack architecture addresses inference economics in ways that prior platforms could not. The Vera CPU delivers 1.2 TB/s of bandwidth to support KV cache management and prefill operations, while NVLink 6 enables all 72 GPUs in an NVL72 rack to share memory coherently at 3.6 TB/s per GPU. This tight CPU-GPU coupling eliminates the data movement bottlenecks that forced customers to over-provision GPUs for inference workloads – a structural inefficiency that inflated total cost of ownership on Blackwell and Hopper platforms.

Third, NVIDIA’s integration of Groq LPU (Language Processing Unit) support into the Vera Rubin ecosystem signals a strategic pivot. Through the Dynamo inference orchestration framework, Vera Rubin racks can now offload specific inference tasks to Groq LPUs transparently – without requiring CUDA code changes. This heterogeneous compute approach lets operators assign latency-sensitive token generation to Groq’s deterministic architecture while using Rubin GPUs for compute-intensive prefill and multimodal processing. The willingness to integrate a third-party accelerator into its own platform suggests NVIDIA sees the inference market as large enough to accommodate specialized silicon rather than viewing every alternative chip as a competitive threat.

For infrastructure planners evaluating Vera Rubin deployments in April 2026, the $1 trillion demand projection carries a practical implication: supply allocation will remain constrained through at least mid-2027. Organizations that have not yet secured Rubin capacity through direct purchase agreements or cloud provider reservations should expect 20-30 week lead times once volume production begins. The combination of full production status, validated efficiency gains, and rapidly expanding demand makes Vera Rubin the highest-demand AI platform NVIDIA has ever launched.

April 2026 Verified Specs: HBM4 Bandwidth, MoE Economics, and the 100% Liquid-Cooled Mandate

Beyond the headline architecture announcements, three figures disclosed at GTC 2026 in April reshape how operators should model Rubin deployments. Each one – memory bandwidth, inference cost ratio, and per-GPU power envelope – locks in a specific design choice that determines whether existing data centers can host Rubin at all, and at what economics.

HBM4 at 22 TB/s: 2.8x Blackwell, 6.6x H100, and a Doubled Interface Width

The Rubin GPU’s headline memory configuration – 288 GB of HBM4 delivering 22 TB/s of bandwidth – represents 2.8x the bandwidth of Blackwell’s 8 TB/s and 6.6x over H100’s 3.35 TB/s. The generational leap is not incremental tuning of an existing memory subsystem; it is enabled by HBM4’s doubled interface width of 2,048 bits per stack versus HBM3e, which is the structural change that allows the per-pin data rate gains to actually translate into rack-level throughput. For operators still running large H100 fleets in April 2026, the 6.6x ratio is the relevant comparison: workloads bottlenecked on memory bandwidth – which now describes most production LLM serving – see proportional gains, not the smaller compute-side improvements that are easier to dismiss as marketing math.

One-Tenth Token Cost and One-Quarter the GPUs for MoE Training

NVIDIA’s April 2026 disclosures put hard numbers on the Vera Rubin economics story. Token cost for agentic AI, advanced reasoning, and hyper-scale Mixture-of-Experts (MoE) inference drops to one-tenth that of Blackwell. On the training side, MoE model training requires only one-quarter of the GPUs compared to the previous generation. For an AI lab planning a frontier MoE run that previously needed 4,096 Blackwell GPUs, the Rubin equivalent is roughly 1,024 – a reduction that compounds into proportionally smaller power, cooling, and networking requirements. The 10x inference cost compression is the figure CFOs at hyperscale operators will key on when modeling multi-year Rubin allocation against existing Blackwell amortization.

1,800-2,300W per GPU: No Air-Cooled Configuration Available

The most consequential infrastructure constraint disclosed at GTC 2026 is that Rubin operates at 1,800 to 2,300W per GPU – compared to Blackwell’s 1,000W – and no air-cooled configuration is available. Every Rubin system requires 100% liquid cooling. NVIDIA confirmed it pushed the power target from the original 1,800W up to 2,300W Max-P specifically to compete with AMD’s MI455X, treating the higher envelope as the price of staying ahead on per-GPU performance rather than as a thermal compromise. For data center operators, the practical effect is binary: facilities without direct-to-chip or immersion liquid cooling cannot host Rubin at all, regardless of available power capacity. Retrofitting an air-cooled facility for Rubin-class density typically requires 6 to 12 months of construction work and capital outlay measured in millions per megawatt of converted capacity, which is why operators that began liquid cooling investments in 2024-2025 now hold a significant timing advantage in securing Rubin allocation.