Aantaric Technologies Interview Experience|Analog Design Engineer|FTE|

Eligibility

Only students from ECE, EE, and EI branches were eligible for the recruitment process.

Round 1: CGPA Shortlisting

The initial shortlisting was based on CGPA, with a minimum cutoff of 8.75. Students who met this criterion qualified for the next round.

Round 2: Test

Only 29 candidates were shortlisted for an 80-mark subjective test, divided into two sections:

• Section 1 (30 marks): Focused on network theory.
• Section 2 (50 marks): Covered analog and CMOS topics.

This test aimed to assess candidates' depth of understanding in fundamental electronics subjects.

Round 3: Interview

Only 3 candidates, including myself, advanced to the interview stage. Although conducted online, we were required to be physically present with a company representative.

Interview Questions:

1. High-Pass RC Circuit: I was asked to draw a high-pass RC circuit, derive its transfer function, and sketch the Bode magnitude and phase plots.
2. RC Circuit with Clock Pulse: Given a clock pulse applied to an RC circuit with RC significantly larger than the clock period (𝑇), I was asked to sketch the resulting waveform across the circuit.

Result

I was not selected for the next stage. Ultimately, only one candidate received the final offer.