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⇱ GCC Compiler Adds Targeting Support For XuanTie RISC-V CPUs - Phoronix


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GCC Compiler Adds Targeting Support For XuanTie RISC-V CPUs

Written by Michael Larabel in GNU on 22 April 2025 at 09:41 AM EDT. 4 Comments
One of the early features being merged for what will become the GCC 16 compiler following last week's GCC 15 code branching is CPU targeting support for the XuanTie RISC-V processors.

GCC Git as of today allows "-mcpu=" targeting for various XuanTie RISC-V processor cores. New -mcpu= values are for xt-c908, xt-c908v, xt-c910, xt-c910v2, xt-c920, and xt-c920v2 for the different XuanTie processors.

XuanTie is an Alibaba brand that has been developing different RISC-V cores for cloud computing, AI Acceleration, and related server-focused computing needs.

👁 XuanTie C920


The XuanTie C920 offers up to four RISC-V cores per cluster, RISC-V Vector 1.0 ISA support, RVA22 profile, and these RV64GCV cores can clock up to 2.5GHz to provide sufficient power for AI, autonomous driving, and related compute needs.

Those interested in this XuanTie xt-c908, xt-c908v, xt-c910, xt-c910v2, xt-c920, and xt-c920v2 -mcpu support now in the GCC 16 compiler can see this commit for all the details.

Michael Larabel is the principal author of Phoronix.com and founded the site in 2004 with a focus on enriching the Linux hardware experience. Michael has written more than 20,000 articles covering the state of Linux hardware support, Linux performance, graphics drivers, and other topics. Michael is also the lead developer of the Phoronix Test Suite, Phoromatic, and OpenBenchmarking.org automated benchmarking software. He can be followed via Twitter, LinkedIn, or contacted via MichaelLarabel.com.