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⇱ Intel's AVX10.2 Patches Merged For GCC 15 To Drop 256-bit Rounding & AVX10.2-256 Options - Phoronix


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Intel's AVX10.2 Patches Merged For GCC 15 To Drop 256-bit Rounding & AVX10.2-256 Options

Written by Michael Larabel in Intel on 24 March 2025 at 10:00 AM EDT. 1 Comment
What a week. Last week Intel published a new AVX10 whitepaper where they dropped the optional 512-bit support of AVX10.2 and confirmed future P and E cores will have AVX10.2-512 support unconditionally. A very welcome change by Intel albeit late in rushing to get patches out to change that behavior ahead of the GCC 15 stable compiler release as well as working similar changes into the LLVM Clang compiler. As of today those GNU Compiler Collection patches have been merged to prepare for AVX10.2 always having 512-bit support available.

The set of patches by Intel compiler engineers to drop the AVX10.2 256-bit rounding support now that it's removed from the whitepaper as well as dropping the AVX10.2-256 / AVX10.2-512 options have been merged today to GCC Git ahead of the upcoming GCC 15.1 release. GCC 15.1 is to be the first stable release of the GCC 15 compiler series as this annual feature release. GCC 15.1 should be out in the coming weeks, is already in its final stage of development, and really was a last minute change for Intel in deciding to do away with AVX10.2-256 / optional 512-bit support considering all their previously merged patches for AVX10.2 had made those accommodations.

👁 GCC 15 drops AVX10.2-256


The clearest communication on the matter is this patch dropping the avx10.2-256 and avx10.2-512 options where from Intel it's spelled clear as day that both P and E cores will support AVX10.2 512-bit vector widths:
"When AVX10.2 options are added into GCC 15, E-core is supposed to support up to 256 bit vector width, while P-core up to 512 bit vector width. Therefore, we added avx10.2-256 and avx10.2-512 options into compiler since there will be real platforms with 256 bit only support.

However, all the future platforms will now support 512 bit vector width, including P-core and E-core. It will result in no need for split the option for vector width. Therefore, we will remove them in this patch."

The code is merged in GCC Git and thus GCC 15.1 is in good shape for the future Intel E and P cores supporting AVX10.2 in all of its 512-bit glory.

Other changes to find with the upcoming GCC 15.1 release include moving the default C language to C23, Intel Xeon 7 Diamond Rapids support, Fujitsu Monaka CPU support, initial Intel APX enablement, retiring of Xeon Phi support, new AMD Zen optimizations, much better Rust language support, the new COBOL front-end, and many other C and C++ language support improvements.

Michael Larabel is the principal author of Phoronix.com and founded the site in 2004 with a focus on enriching the Linux hardware experience. Michael has written more than 20,000 articles covering the state of Linux hardware support, Linux performance, graphics drivers, and other topics. Michael is also the lead developer of the Phoronix Test Suite, Phoromatic, and OpenBenchmarking.org automated benchmarking software. He can be followed via Twitter, LinkedIn, or contacted via MichaelLarabel.com.