Intel Linux Driver Working To Enable "CMTG" Feature For Lunar Lake Onwards
With Lunar Lake and newer Intel graphics there is a new feature called the Common Mode Timing Generator (CMTG) that so far hasn't been enabled by the open-source Intel Linux graphics driver. But patches being worked on are enabling this CMTG feature that will unlock other functionality moving forward.
The display engine with Lunar Lake and newer supports CMTG. CMTG serves as a timing generator running in parallel with transcoder timing generators and can be used for synchronization across multiple displays.
Intel's Common Mode Timing Generator supports uses such as keeping two Display Port / Embedded DisplayPort (eDP) timing generators in sync, including with features like Panel Self Refresh (PSR / PSR2). It can also lead to an improved experience when adding a secondary display to not require a modeset on an existing eDP when a new eDP is added.
With the upcoming Xe3_LPD graphics with Panther Lake, CMTG apparently becomes more important and there also being a second CMTG. Thus the Intel Linux driver engineers are working to enable the CMTG functionality under Linux rather than leaving it disabled, especially for any other display-related features moving forward that may depend upon CMTG being enabled. One feature noted in this week's driver patch series for CMTG is dynamic DC state enablement that will come with later patches.
This patch series was posted this week as a request for comments (RFC) on this Intel CMTG enablement for Linux. Intel's testing of this enablement under Linux remains ongoing but are soliciting early feedback. The code is too late for potentially being ready in time for the upcoming Linux v6.19 cycle especially with testing and enablement ongoing, but hopefully it will arrive for a 2026 Linux kernel release.
The display engine with Lunar Lake and newer supports CMTG. CMTG serves as a timing generator running in parallel with transcoder timing generators and can be used for synchronization across multiple displays.
Intel's Common Mode Timing Generator supports uses such as keeping two Display Port / Embedded DisplayPort (eDP) timing generators in sync, including with features like Panel Self Refresh (PSR / PSR2). It can also lead to an improved experience when adding a secondary display to not require a modeset on an existing eDP when a new eDP is added.
With the upcoming Xe3_LPD graphics with Panther Lake, CMTG apparently becomes more important and there also being a second CMTG. Thus the Intel Linux driver engineers are working to enable the CMTG functionality under Linux rather than leaving it disabled, especially for any other display-related features moving forward that may depend upon CMTG being enabled. One feature noted in this week's driver patch series for CMTG is dynamic DC state enablement that will come with later patches.
This patch series was posted this week as a request for comments (RFC) on this Intel CMTG enablement for Linux. Intel's testing of this enablement under Linux remains ongoing but are soliciting early feedback. The code is too late for potentially being ready in time for the upcoming Linux v6.19 cycle especially with testing and enablement ongoing, but hopefully it will arrive for a 2026 Linux kernel release.