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⇱ Intel Proposes "SYCLBIN" As New Format For SYCL Device Code - Phoronix


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Intel Proposes "SYCLBIN" As New Format For SYCL Device Code

Written by Michael Larabel in LLVM on 16 October 2025 at 06:15 AM EDT. 1 Comment
SYCLBIN has been proposed by a longtime Intel compiler expert as a new way for storing SYCL device code for use as part of their GPU/XPU programming ambitions.

Yury Plyakhin is a nearly 20 year veteran of Intel working on their compiler teams around the Intel Graphics Compiler and related efforts. As part of their investment in SYCL for their GPU compute programming paradigm, SYCLBIN is being proposed to the upstream LLVM community as a better way for storing SYCL device code.

👁 SYCLBIN


SYCLBIN aims to be lightweight, extensible, and handled better by the SYCL runtime and tooling than alternatives. LLVM's offloading infrastructure has several binary formats already but options like SPIR-V / LLVM Bitcode / PTX are lacking a single-module designm, the formats lacking native support for SYCL-specific metadata, various vendor constraints/lock-ins, and limited container capabilities. SYCLBIN also aims to encapsulate SYCL-specific logic within SYCL-specific toolchain components while isolating SYCL implementation details.

Those curious about Intel's proposal for the SYCLBIN binary format for the LLVM toolchain can find their initial proposal via the LLVM Discourse. Nice seeing Intel continuing to make new investments around SYCL for GPU compute.

Michael Larabel is the principal author of Phoronix.com and founded the site in 2004 with a focus on enriching the Linux hardware experience. Michael has written more than 20,000 articles covering the state of Linux hardware support, Linux performance, graphics drivers, and other topics. Michael is also the lead developer of the Phoronix Test Suite, Phoromatic, and OpenBenchmarking.org automated benchmarking software. He can be followed via Twitter, LinkedIn, or contacted via MichaelLarabel.com.