Intel Wildcat Lake "-march=wildcatlake" Added To GCC & LLVM Clang Compilers
While the open-source GCC and LLVM/Clang compilers saw Panther Lake support added in early 2024, only overnight was support upstreamed to GCC and Clang for the similar Wildcat Lake target.
Wildcat Lake as the budget/low-power alternative to Panther Lake now has support added to the GCC and LLVM/Clang compilers. There's been a lot of work in recent months adding support for Intel Wildcat Lake to the Linux kernel drivers and other support in the open-source ecosystem -- mostly new IDs and otherwise following the same code paths as the Panther Lake support.
This commit added the "-march=wildcatlake" targeting support to GCC Git for next year's GCC 16 release. This is also expected to be back-ported to the next GCC 15 point release.
There was also a commit to fix the ISA set for Panther Lake as well as Diamond Rapids. Panther Lake does not enable PREFETCHI so that had to be removed from its targeting. Meanwhile Xeon Diamond Rapids dropped support for USER_MSR in the latest Intel ISA documentation.
Similarly was the LLVM commit for adding Wildcat Lake to LLVM/Clang.
This Wildcat Lake "-march=wildcatlake" and "-mcpu=wildcatlake" compiler targeting is following the same ISA features as Panther Lake with the same Cougar Cove and Darkmont cores present.
Wildcat Lake as the budget/low-power alternative to Panther Lake now has support added to the GCC and LLVM/Clang compilers. There's been a lot of work in recent months adding support for Intel Wildcat Lake to the Linux kernel drivers and other support in the open-source ecosystem -- mostly new IDs and otherwise following the same code paths as the Panther Lake support.
This commit added the "-march=wildcatlake" targeting support to GCC Git for next year's GCC 16 release. This is also expected to be back-ported to the next GCC 15 point release.
There was also a commit to fix the ISA set for Panther Lake as well as Diamond Rapids. Panther Lake does not enable PREFETCHI so that had to be removed from its targeting. Meanwhile Xeon Diamond Rapids dropped support for USER_MSR in the latest Intel ISA documentation.
Similarly was the LLVM commit for adding Wildcat Lake to LLVM/Clang.
This Wildcat Lake "-march=wildcatlake" and "-mcpu=wildcatlake" compiler targeting is following the same ISA features as Panther Lake with the same Cougar Cove and Darkmont cores present.