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⇱ AMD Driver Lands DCC For Multi-Plane Formats With RDNA4, Tiling For Video Buffers - Phoronix


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AMD Driver Lands DCC For Multi-Plane Formats With RDNA4, Tiling For Video Buffers

Written by Michael Larabel in Radeon on 26 February 2025 at 08:55 AM EST. 3 Comments
More RadeonSI Gallium3D changes worth mentioning have landed today in Mesa 25.1 Git for the open-source Linux graphics driver stack.

David Rosca working as a contractor for AMD working to improve the open-source video acceleration code has landed another round of enhancements. Merged today was ac, radeonsi/vcn: Enable tiling for video buffers. As implied given the title, tiling for video buffers is now enabled:
"This enables tiling for video buffers by default.

VAAPI frontend, VCN encode, decode and JPEG can now correctly handle tiling, so we can finally enable it. Applications at this point should also be able to correctly handle non-linear modifier when exporting surfaces."

👁 AMD tiling video buffers


One notable patch as part of that worth mentioning is DCC for multi-plane formats with GFX12 hardware, a.k.a. RDNA4. Mesa 25.0 already has DCC for RDNA4 GPUs with Delta Color Compression being important for performance purposes. Now DCC with upcoming Radeon RX 9070 graphics cards also will work for multi-plane formats.

These improvements will be part of the Mesa 25.1 release due out in Q2.

Michael Larabel is the principal author of Phoronix.com and founded the site in 2004 with a focus on enriching the Linux hardware experience. Michael has written more than 20,000 articles covering the state of Linux hardware support, Linux performance, graphics drivers, and other topics. Michael is also the lead developer of the Phoronix Test Suite, Phoromatic, and OpenBenchmarking.org automated benchmarking software. He can be followed via Twitter, LinkedIn, or contacted via MichaelLarabel.com.