VOOZH about

URL: https://www.phoronix.com/review/483/3

⇱ AMD Athlon 64 X2 4200+ & Sempron 3400+ (Socket AM2) Review - Phoronix


👁 Phoronix

AMD Athlon 64 X2 4200+ & Sempron 3400+

Written by Michael Larabel in Processors on 30 May 2006 at 01:00 PM EDT. Page 3 of 7. Add A Comment.

processor : 0
vendor_id : AuthenticAMD
cpu family : 15
model : 75
model name : AMD Athlon(tm) 64 X2 Dual Core Processor 4200+
stepping : 2
cpu MHz : 2221.973
cache size : 512 KB
physical id : 0
siblings : 2
core id : 0
cpu cores : 2
fpu : yes
fpu_exception : yes
cpuid level : 1
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat 
 pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt lm 3dnowext 
 3dnow pni cx16 lahf_lm cmp_legacy svm cr8_legacy
bogomips : 4454.09
TLB size : 1024 4K pages
clflush size : 64
cache_alignment : 64
address sizes : 40 bits physical, 48 bits virtual
power management: ts fid vid ttp tm stc

processor : 1
vendor_id : AuthenticAMD
cpu family : 15
model : 75
model name : AMD Athlon(tm) 64 X2 Dual Core Processor 4200+
stepping : 2
cpu MHz : 2221.973
cache size : 512 KB
physical id : 0
siblings : 2
core id : 1
cpu cores : 2
fpu : yes
fpu_exception : yes
cpuid level : 1
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat 
 pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt lm 3dnowext 
 3dnow pni cx16 lahf_lm cmp_legacy svm cr8_legacy
bogomips : 4444.10
TLB size : 1024 4K pages
clflush size : 64
cache_alignment : 64
address sizes : 40 bits physical, 48 bits virtual
power management: ts fid vid ttp tm stc

processor : 0
vendor_id : AuthenticAMD
cpu family : 15
model : 79
model name : AMD Sempron(tm) Processor 3400+
stepping : 2
cpu MHz : 1817.985
cache size : 256 KB
fpu : yes
fpu_exception : yes
cpuid level : 1
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat 
 pse36 clflush mmx fxsr sse sse2 syscall nx mmxext fxsr_opt lm 3dnowext 
 3dnow pni cx16 lahf_lm cr8_legacy
bogomips : 3642.17
TLB size : 1024 4K pages
clflush size : 64
cache_alignment : 64
address sizes : 40 bits physical, 48 bits virtual
power management: ts fid vid ttp tm stc