RISC-V has been everywhere recently, with the alternative instruction set architecture (ISA) building momentum to challenge the dominance of x86 and ARM. This has included several high-profile announcements from Qualcomm and Google, as well as the recent formation of the RISE (RISC-V Software Ecosystem) Project with support from everyone from Red Hat to Intel. Google even recently announced that native Android support is coming to RISC.

Big companies are uniting behind RISC-V, and while it's not yet clear if it can live up to the hype, plenty of serious players (including some you might not expect) are putting their chips down. Instruction sets are shaping up to be a key battleground for tech over the next decade and RISC is quickly gaining momentum.

What is an instruction set?

A complex building block of CPU architecture

Before we get into RISC-V, let's talk about instruction sets, which are one of the fundamental building blocks of CPU architectures and define the tasks a CPU can perform. These instructions range from very simple, such as ADD (adding the values in two given registers or memory addresses), to more complex instructions for memory security or management. An instruction set implements all or part of an ISA, which specifies a range of instructions along with their expected inputs and behavior. This is normally described as either Reduced or Complex Instruction Set Computers (RISC and CISC).

The difference between these two can be tricky, but you can think of RISC as trying to combine many small instructions to do things quickly (normally in a single clock cycle), whereas CISC has many more instructions with more functionality that might take longer. Typically, a CPU implementing all or part of the x86 ISA (the most widely adopted CISC ISA) will implement several hundred instructions, whereas it's common for RISC CPUs to implement under 100. Most ISAs don't require a fixed number of instructions in the final instruction set, instead offering a modular design with several extensions optionally implemented by manufacturers.

Since an instruction set fundamentally defines the tools available to software, changing it can be difficult since ISAs require all the software running on a computer to be rebuilt (or recompiled) for a new ISA. This often requires significant modifications to each bit of software and is a costly and time-consuming process that requires significant developer support. Changing ISAs is rare precisely for this reason, and a very real chicken-and-egg problem exists in getting developers to build their software to support a new ISA. That's where RISC-V comes in.

What is RISC-V?

An ISA that's consistently growing

👁 A photo of an advertising board for a RISC-V summit.

RISC-V is an ISA first created at the Parallel Computing Laboratory at U.C. Berkeley in 2010. It's a royalty-free open-source ISA designed to eliminate the need to pay licensing fees, normally to Intel or ARM. In 2015, RISC-V left the lab, and the RISC-V Foundation was launched with 36 founding members. This later became RISC-V International, which, under a new membership-based investment structure, continues the research and governance of RISC-V today. The foundation now has over 100 members and is continuously running events worldwide to support the growth of RISC-V.

What is RISE?

RISE was founded earlier this year in collaboration with RISC-V and the Linux Foundation, and it already has backing from Intel, MediaTek, Red Hat, Qualcomm, and Google, among others. RISE is focused on improving software toolchains to support the growth of RISC-V. The project's direction is set by a technical steering committee, similar to other Linux Foundation projects.

RISE is directly tackling the chicken-and-egg problem of adopting a new ISA by requiring its members to commit dollar values or engineering time to developing open-source software for RISC-V, and it's already making great strides. For example, Android has already been rebuilt for RISC-V, as has Ubuntu and some other Linux distros.

When might we see RISC-V in the wild?

They're around if you know where to look

RISC-V devices are already available, though mostly in embedded systems or in devices manufactured or aimed at the Chinese market. Both China and Russia have leaned heavily into RISC-V recently as a way to diversify from dependency on Western technologies. Several RISC-V-based laptops are available on Alibaba, and RISC-V development boards have been making their way to the Western market. Chinese firm Sipeed is offering RISC-V-based development boards in form factors ranging from Steam Deck alternatives to handheld Linux terminals, and Huawei released its first RISC-V-based development kits for HarmonyOS-based IoT devices back in 2021.

Likewise, Intel broke ground in 2021 on two new fabrication facilities in Arizona and has announced the construction of two more in Ohio will kick off in 2025. Intel has been working to resurrect its foundry operations in recent years, and a big influx of RISC-V chips could help them fill out the volume for these new U.S.-based fabs. It's a gamble lots of companies are taking, diving in early with RISC-V to avoid being left behind and gain experience while RISC-V remains in its infancy.

Is it ready for the big time?

But RISC-V isn't quite ready for the big time. While ARM can be expensive, its technology has been well-refined. CISC ISAs originally gained popularity as they allowed early engineers to implement features easily in their CPUs that are required for more complex computing. However, over the last decade, ARM's RISC-based designs have grown in capability and competency while remaining a generally more energy-efficient option.

In theory, ARM and RISC-V CPUs should be capable of similar performance. However, ARM software support is already extensive (with its CPUs running phones and laptops already), giving it a huge initial lead over any new RISC-V devices.

This head-start is part of the reason why RISC-V isn't (yet) challenging ARM devices for most consumers, naturally following in ARM's footsteps by carving out a market for low-power and energy-efficient devices first. Targeting the lower end of the market will allow RISC-V to first establish a base of tooling and developer support, as well as refine its energy efficiency at both a hardware and software level. RISC-V International (and, by extension, its member companies) are starting work on moving products to RISC-V now in the hope that, as development progresses, more powerful and energy-efficient implementations become available.

Intel?

As we mentioned earlier, even Intel (the proprietor of the profitable x86 ISA) is investing big in RISC-V. Intel's difficulties in providing energy-efficient x86 devices has led to it losing out to ARM significantly over the last decade, including on the bulk of Apple's ARM-focused in-house silicon and on Qualcomm and Samsung in the wider mobile market.

The potential of RISC architectures has long been recognized, a potential that was a key driver of Apple's early decision to adopt RISC-based Motorola and PowerPC chips in early Macs. But over the last decade, ARM has unleashed that potential. Intel now finds itself losing x86 market share to ARM even in its most dominant categories, with AWS pushing new Graviton-based ARM chips hard as a cheaper alternative than x86 in the Cloud. Intel has pivoted to investing heavily in RISC-V, publicly committing $1B to its foundry services, including significant investment in RISC-V fabs.

Can RISC-V catch up?

Only time will tell

The demand for RISC-V to succeed is clear. Businesses have no desire to continue padding the pockets of Intel/ARM with their licensing fees, and ARM has paved the way for low-power RISC chips by competing against Intel. RISC-V will attempt to emulate ARM's path to success, competing in the lower-power and development spaces first.

This is something we're already seeing happening, for example, with Google and Qualcomm's announcement of a RISC-V-based Snapdragon Wear Platform. It's also clear that with the establishment of RISE and the ongoing investment in major companies from both the OEM and consumer space, support for RISC-V is there. Whether its current momentum is enough to carry RISC-V through the slow slog that is catching up to ARM remains unclear, but there is a clear business interest for RISC-V to succeed. ARM reported a record revenue of over $800 million in Q2 of this year alone, which ultimately comes from a share of other companies' profits. That said, there have been failed gambles in the past, with PowerPC standing out, so we'll have to see where RISC-V goes from here.