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⇱ Exploring The Zen 5 SMT Performance With The AMD EPYC 9755 "Turin" CPU - Phoronix


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Exploring The Zen 5 SMT Performance With The AMD EPYC 9755 "Turin" CPU

Written by Michael Larabel in Processors on 17 October 2024 at 01:38 PM EDT. Page 2 of 6. 25 Comments.

In workloads like code compilation, running with SMT off for the EPYC 9755 was yielding better performance in some cases for splitting the work between 128 jobs rather than 256 jobs due to memory bandwidth / IO constraints. With other larger codebases, the results were rather indifferent. For those using a high core count Zen 5 server for a CI/CD build box type deployment will likely be better off running multiple separate builds concurrently depending upon your workflow and frequency of issuing new builds rather than spreading out a single compilation across the entire CPU but for simplicity sake and the broadest relevance to readers, this was one build at a time.

Turning to OpenSSL performance, SMT still proved very much beneficial here on the 128-core Zen 5 processor.

The CPU power use for the EPYC 9755 was similar regardless of SMT being enabled, so with SMT was a nice boost to power efficiency.

The OpenMP-threaded John The Ripper also enjoyed having SMT on this 128-core processor.

The CPU power consumption was actually around 40 Watts higher when SMT was disabled on this EPYC 9755 1P processor.... So in this case it's a nice perf-per-Watt win with the default SMT mode.