pynq-z2

Here are 66 public repositories matching this topic...

andre1araujo / YOLO-on-PYNQ-Z2

This repository contains all the necessary material to implement a YOLOv3 object detection algorithm on the PYNQ-Z2 FPGA. There is a step-by-step tutorial associated so everyone can do it.

deep-neural-networks fpga deep-learning yolov3 yolov3-tiny pynq-z2

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C++

sefaburakokcu / quantized-yolov5

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Low Precision(quantized) Yolov5

fpga yolov1 finn low-precision quantized-neural-networks pynq-z2 brevitas yolov5

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Python

sefaburakokcu / finn-quantized-yolo

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Low-Precision YOLO on PYNQ with FINN

fpga face-detection yolov3 finn qnn pynq-z2 tiny-yolov3

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Jupyter Notebook

MakarenaLabs / Xilinx-FPGA-HLS-PYNQ-ALVEO-Flow

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Simple examples for FPGA design using Vivado HLS for high level synthesis and Vivado for bitstream generation.

fpga xilinx pynq alveo pynq-z2 alveo-u200

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Jupyter Notebook

xupsh / pynq-supported-board-file

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pynq pynq-z1 board-file pynq-z2

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dsa-shua / FPGA-SystolicArray

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Working 8x8 systolic array hardware implemented in Xilinx Vivado, operated and controlled in software using Xilinx Vitis

sdk fpga hardware accelerator matrix project matrix-multiplication verilog xilinx vivado systemverilog hardware-designs hdl hardware-acceleration zynq-7000 systolic-arrays pynq-z2 vitis

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SystemVerilog

junwha / MNIST-FPGA-Accelarator

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MNIST accelerator using binary qunatization on Xilinx pynq-z2

mnist mnist-classification vivado pynq hardware-acceleration mnist-image-dataset vivado-hls pynq-z2

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C++

reed-foster / pynq-audio

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RTL and python for using the ADAU1761 audio codec on the Pynq-Z2 board from TUL

audio i2s-audio pynq-z2

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SystemVerilog

kuoyaoming93 / sem-ip_pynq

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SEM (Soft Error Mitigation) IP adapted for PYNQ-Z2

python zynq jupyter-notebook xilinx uart pynq pynq-hardware-overlay xilinx-fpga icap xilinx-vivado axi pynq-z1 pynq-z2 soft-error sem-ip

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Tcl

XAli-SHX / FPGA-Implementation-of-Image-Processing-for-MNIST-Dataset-Based-on-CNN-Algorithm

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FPGA Implementation of Image Processing for MNIST Dataset Based on Convolutional Neural Network Algorithm (CNN)

python fpga deep-learning neural-network tensorflow keras cnn mnist verilog vivado ps pynq cnn-keras pl mnist-handwriting-recognition pynq-z2 programmable-logic processing-system

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VHDL

m-spr / RCEHDC

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An automated HDC platform

vhdl fpga-accelerator pynq-z2 hyperdimensional-computing

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VHDL

PCov3r / FPGA_Handwritten_digit_recognition

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A Verilog implementation of a hand-written digit recognition Neural Network

machine-learning fpga neural-network handwritten-digit-recognition pynq-z2 verilog-neural-network

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Jupyter Notebook

franout / tensorflow_for_pynqz2

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tensorflor 2.1 wheel for pynq z2 ( zynq 7000 xilinx SoC ), cross compiled with different compiler's flags using the script provided by tensorflow for building it for rasberry

machine-learning armv7 pynq-z2 tensorflow2

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Shell

ZeroX29a / PynqZ2

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Complete collection of general resource of Pynq Z2

vivado getting-started pynq-z2

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Tcl

👁 PYNQ-SoC-Builder

Logicademy / PYNQ-SoC-Builder

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This project automates process of creating a PYNQ Z1/Z2 Overlay in Vivado, generates a custom Juypter Notebook template and uploads to a target PYNQ FPGA.