Must-have verilog systemverilog modules
spi-interface fpga hls encoder delay tcl verilog debounce xilinx synchronizer uart altera uart-verilog fifo pwm uart-protocol spi-master uart-controller uart-tx uart-receiver
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- Verilog
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uart-receiver
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Serial communacation (USART) on the ATMega 2560 using C++ classes
avr cmake serial uart usart uart-protocol serial-communication flashes atmega2560 atmel-avr-microcontroller uart-tx uart-receiver
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- C++
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- Verilog
Projekt (UART přijímací část) z předmětu Návrh číslicových systémů (INC), druhý semestr bakalářského studia BIT na FIT VUT/BUT, ak.rok 2021/2022
fsm fpga vhdl university-project xilinx uart xilinx-fpga vutbr vut vhdl-code vut-fit vhdl-coursework uart-receiver brno-university-of-technology
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- VHDL
Universal Asynchronous Receiver Transmitter
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- Verilog
Contents presented in the Microcontrollers Laboratory Course; Microcontrollers used: Arduino UNO R3 & DOIT ESP32 DEVKIT V1 - CSE Department, Shiraz University, Spring 2025.
arduino microcontroller esp32 arduino-uno rgb-led uart-protocol microlab push-button softwareserial-library arduino-uno-r3 esp32-arduino uart-transmitter uart-receiver analog-to-digital-converter serial-communications esp32-webserver doit-esp32-devkit-v1 post-get-method
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- C++
This is an ESP32 project for receiving json from another device by uart and send it to the server. Also provide web service for management.
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- Python
SystemVerilog UART transciever
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- SystemVerilog
A complete UART (Universal Asynchronous Receiver/Transmitter) implementation for FPGAs, written in Verilog HDL. This project includes transmitter and receiver modules, baud rate generation, and test infrastructure for both simulation and hardware validation.
simulation rtl verilog vivado uart systemverilog uart-verilog fpga-soc testbench verilog-hdl fpga-board vivado-hls nexys4ddr verilog-project uart-transmitter uart-receiver fpga-programming vivado-simulator
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- SystemVerilog
Device connection and data transmission via UART - simple example
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- C
If we run out of input pins on FPGA, we can instantiate receiver of uart in DUT (design under test). Receiver will receive data from PC serially and convert this serial data to parallel data and give it to DUT to use it without hesitation of shortage of input pins.
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