16-bit Medium Precision Improvements Merged For AMD Radeon Mesa Code

Written by Michael Larabel in Mesa on 15 June 2025 at 06:34 AM EDT. 2 Comments

Prominent AMD Mesa developer Marek Olšák this week landed a number of fixes for the RadeonSI Gallium3D driver code in working to enable medium precision "mediump" support for this open-source graphics driver.

The 16-bit medium precision work for the RadeonSI driver isn't completely wrapped up yet but it's being worked on and Marek remarked that "it seems like it might happen." With a set of 13 patches merged to Mesa 25.3 this week, there have been several mediump and 16-bit IO fixes. Marek explained in that merge request:

"These are fixes and improvements for issues I discovered while trying to enable mediump IO for radeonsi.

#13298 is required for mediump XFB lowered to 16 bits, but this MR adds shader_info fields that allow not lowering mediump for certain cases of linked shaders like XFB, which allows drivers to support mediump IO for non-XFB cases of linked shaders while all other cases keep mediump IO as 32 bits. With that, mediump IO can be enabled only for a subset of cases of linked shaders that are known to work.

One commit also contains a workaround for RADV inside nir_opt_vectorize_io. I think this has been a known issue."

Those medium fixes were merged for the open-source AMD Radeon driver code. In a Mesa issue, Marek also commented:

"While trying to enable mediump IO for radeonsi (and it seems like it might happen), I was able to fix a lot of issues with mediump in IO passes.

One of the remaining issues to fix is in gl_nir_lower_packed_varyings because of how mediump XFB works."

We'll see if RadeonSI medium precision support manages to wrapped up in time for the Mesa 25.2 release next quarter.