system-on-chip

Here are 101 public repositories matching this topic...

enjoy-digital / litex

Build your hardware, easily!

Updated
C

The-OpenROAD-Project / OpenLane

OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen and custom methodology scripts for design exploration and optimization.

magic asic rtl verilog vlsi foundry yosys klayout caravel netgen system-on-chip openroad openram skywater 130nm soc-design rtl2gds

Updated
Python

splinedrive / kianRiscV

Star

RISC-V XV6/Linux SoC, marchID: 0x2b

linux asic cpu fpga x11 riscv verilog xv6 systemverilog mmu soc system-on-chip rv32ima chipdesign tinytapeout sv32

Updated
Verilog

sld-columbia / esp

Star

Embedded Scalable Platforms: Heterogeneous SoC architecture and IP integration made easy

asic fpga embedded-systems riscv system-on-chip network-on-chip accelerators

Updated
C

kactus2 / kactus2dev

Star

Kactus2 is a graphical EDA tool based on the IP-XACT standard.

design fpga hardware eda ip-xact reuse hdl mpsoc system-on-chip

Updated
C++

stnolting / neo430

Star

💻 A damn small msp430-compatible customizable soft-core microcontroller-like processor system written in platform-independent VHDL.

open-source microcontroller fpga processor vhdl gcc customizable msp430 soc soft-core system-on-chip msp430-gcc

Updated
VHDL

rafaelcalcada / rvx

Star

RISC-V microcontroller IP core for embedded, FPGA and ASIC applications

microcontroller cpu gpio core i2c processor riscv spi uart mcu risc-v rv32i system-on-chip rvx zicsr

Updated
Verilog

ultraembedded / riscv_soc

Sponsor

Star

Basic RISC-V Test SoC

linux verilog fpga-soc-linux systemc fpga-soc risc-v system-on-chip riscv-linux

Updated
Verilog

👁 Awesome-Retro-Docs

TinyRetroWarehouse / Awesome-Retro-Docs

Star

A curated collection of technical documentation for Arcades, Handhelds, Consoles, Computers and MCU’s.

video-games documentation arm fpga mips pcb arcade wiring diagrams retrogaming schematics mcu user-manual system-on-chip eletronics manuals datasheets service-manual fpga-programming vintage-computers

Updated

arm-education / Introduction-to-SoC-Design-Education-Kit

Star

Education kit for teaching introductory Arm-based system-on-chip design on FPGA with lectures and practical labs (educational)

arm fpga cortex-m vhdl cmsis hardware-designs soc teaching-materials arm-cortex-m0 system-on-chip amba ahb soc-design keil-mdk system-on-chip-design design-start education-kit

Updated
HTML

azonenberg / antikernel

Sponsor

Star

The Antikernel operating system project

fpga operating-system research-project security-hardening fpga-soc system-on-chip

Updated
Verilog

meiniKi / FazyRV

Star

A minimal-area RISC-V core with a scalable data path to 1, 2, 4, or 8 bits and manifold variants.

fpga embedded-systems computer-architecture risc-v digital-design system-on-chip vlsi-design

Updated
SystemVerilog

amaranth-lang / amaranth-soc

Star

System on Chip toolkit for Amaranth HDL

fpga system-on-chip amaranth-hdl

Updated
Python

aesc-silicon / ElemRV

Star

ElemRV - End-to-end Open-Source RISC-V Microcontroller

asic risc-v system-on-chip spinalhdl system-on-chip-design chipdesign open-source-silicon

Updated
Scala

👁 ILAng

PrincetonUniversity / ILAng

Star

A Modeling and Verification Platform for SoCs using ILAs

accelerator verification abstraction ila heterogeneous system-on-chip formal ilang

Updated
C++

sparkfun / ESP32_Thing

Star

Development platform for the Espressif ESP32 WiFi/Microcontroller SoC

iot hardware esp32 wifi iot-platform system-on-chip sparkfun-products

Updated

sy2002 / QNICE-FPGA

Star

QNICE-FPGA is a 16-bit computer system for recreational programming built as a fully-fledged System-on-a-Chip in portable VHDL.

c tutorial cpu fpga vhdl assembler open-hardware fpga-game sd-card vga 16-bit soft-core system-on-chip vhdl-examples qnice learn-fpga fpga-tutorial vhdl-tutorial

Updated
Assembly

maikmerten / spu32

Star

Small Processing Unit 32: A compact RV32I CPU written in Verilog

fpga verilog icestorm risc-v ice40 rv32i system-on-chip risc-processor

Updated
C

RISC-KC / basic_rv32s

Star

🎓 Instructional RISC-V processor design framework: single-cycle to 5-stage pipeline with FPGA verification and complete learning guidelines! A RISC-V CPU design guideline.

computer-science cpu fpga processor riscv verilog computer-architecture hdl soc verilog-hdl risc-v soft-core rv32i system-on-chip riscv32 dhrystone rv32 processor-design basic-rv32s risc-v-learn

Updated
Verilog

manili / VSDBabySoC

Star

VSDBabySoC is a small mixed-signal SoC including PLL, DAC, and a RISCV-based processor named RVMYTH.

risc-v mixed-signal system-on-chip digital-to-analog-converter phase-locked-loop rvmyth

Updated
Verilog

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system-on-chip

Here are 101 public repositories matching this topic...

enjoy-digital / litex

The-OpenROAD-Project / OpenLane

splinedrive / kianRiscV

sld-columbia / esp

kactus2 / kactus2dev

stnolting / neo430

rafaelcalcada / rvx

ultraembedded / riscv_soc

TinyRetroWarehouse / Awesome-Retro-Docs

arm-education / Introduction-to-SoC-Design-Education-Kit

azonenberg / antikernel

meiniKi / FazyRV

amaranth-lang / amaranth-soc

aesc-silicon / ElemRV

PrincetonUniversity / ILAng

sparkfun / ESP32_Thing

sy2002 / QNICE-FPGA

maikmerten / spu32

RISC-KC / basic_rv32s

manili / VSDBabySoC

Improve this page

Add this topic to your repo